NCV7708F
Double Hex Driver
The NCV7708F is a fully protected Hex Half Bridge Driver
designed specifically for automotive and industrial motion control
applications. The six low and high side drivers are freely configurable
and can be controlled separately. This allows for high side, low side,
and H−Bridge control. H−Bridge control provides forward, reverse,
brake, and high impedance states. The drivers are controlled via a
standard SPI interface.
Features
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MARKING
DIAGRAMS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Ultra Low Quiescent Current Sleep Mode
Six Independent High−Side and Six independent Low−Side Drivers
Integrated Freewheeling Protection (LS and HS)
Internal Upper and Lower Clamp Diodes
Configurable as H−Bridge Drivers
R
DS(on)
= 0.6
W
(typ)
5 MHz SPI Control
SPI Valid Frame Detection
Compliance with 5 V and 3.3 V Systems
Overvoltage Lockout
Undervoltage Lockout
Fault Reporting
Current Limit
Overtemperature Protection
Internally Fused Lead in SOIC−28
SSOP−24 NB EPAD
These are Pb−Free Devices
SOIC−28
DW SUFFIX
CASE 751F
NCV7708F
AWLYYWWG
SSOP−24 NB EP
DQ SUFFIX
CASE 940AK
A
WL
YY
WW
G
NCV7708F
AWLYYWWG
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
NCV7708FDWR2G*
Package
SOIC−28W
(Pb−Free)
SSOP−24N
(Pb−Free)
Shipping
†
1000 /
Tape & Reel
1000 /
Tape & Reel
Typical Applications
•
Automotive
•
Industrial
•
DC Motor Management
NCV7708FDQR2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*Contact your local sales representative for the
NCV7708F device availability in SOIC−28 package.
©
Semiconductor Components Industries, LLC, 2017
1
January, 2017 − Rev. 3
Publication Order Number:
NCV7708F/D
NCV7708F
VS2
VS1
DRIVE 1
High−Side
Driver
Waveshaping
VS
EN
ENABLE
ANALOG
BIAS
VS1’
VS2’
CP
Charge
Pump
Control
Logic
VRAIL POR
VRAIL
SO
Fault
LOGIC
BIAS
Fault
Detect
SPI
Control
VS
OUTH1
V
CC
VRAIL Low−Side
Driver
Waveshaping
Under−load
Overcurrent
Thermal
Warning/Shutdown
OUTL1
SI
SPI
SCLK
16 Bit
Logic
and
Latch
VS
OUTH2
DRIVE 2
CSB
CP
OUTL2
VS
DRIVE 3
CP
OUTH3
OUTL3
VS1
Undervoltage
Lockout
VS2
CP
VS
DRIVE 4
OUTL4
OUTH4
VS1
Overvoltage
Lockout
VS2
VS
DRIVE 5
CP
OUTH5
OUTL5
VS
DRIVE 6
CP
OUTH6
OUTL6
GND
Figure 1. Block Diagram
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2
NCV7708F
OUTL5
OUTH5
OUTH4
OUTL4
VS2
GND
GND
GND
GND
VS1
OUTL3
OUTH3
OUTH2
OUTL2
1
OUTH6
OUTL6
SI
SCLK
CSB
GND
GND
GND
GND
V
CC
SO
EN
OUTL1
OUTH1
1
OUTL5
OUTH5
OUTH4
OUTL4
VS2
GND
GND
VS1
OUTL3
OUTH3
OUTH2
OUTL2
OUTH6
OUTL6
SI
SCLK
CSB
GND
GND
V
CC
SO
EN
OUTL1
OUTH1
SOIC−28
SSOP−24
Figure 2. Pin Connection
PIN DESCRIPTION
Pin No.
SSOP−24
1
2
3
4
5
6
7
−
−
8
9
10
11
12
13
14
15
16
17
18
19
−
−
20
21
22
23
24
EPAD
SOIC−28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
−
Symbol
OUTL5
OUTH5
OUTH4
OUTL4
VS2
GND
GND
GND
GND
VS1
OUTL3
OUTH3
OUTH2
OUTL2
OUTH1
OUTL1
EN
SO
V
CC
GND
GND
GND
GND
CSB
SCLK
SI
OUTL6
OUTH6
EPAD
Description
Output Low Side 5. Open drain output driver with internal reverse diode.
Output High Side 5. Open source output driver with internal reverse diode. Drain connected to
VS2’.
Output High Side 4. Open source output driver with internal reverse diode. Drain connected to
VS2’.
Output Low Side 4. Open drain output driver with internal reverse diode.
Power Supply input for the High−Side Output Drivers 4, 5, and 6.
Ground
Ground
Ground
Ground
Power Supply input for the High−Side Output Drivers 1, 2, and 3
Output Low Side 3. Open drain output driver with internal reverse diode.
Output High Side 3. Open source output driver with internal reverse diode. Drain connected to
VS1’.
Output High Side 2. Open source output driver with internal reverse diode. Drain connected to
VS1’.
Output Low Side 2. Open drain output driver with internal reverse diode.
Output High Side 1. Open source output driver with internal reverse diode. Drain connected to
VS1’.
Output Low Side 1. Open drain output driver with internal reverse diode.
Enable. Input high wakes the IC up from sleep mode.
Serial Output. 16 bit serial communications output.
Power supply input for Logic.
Ground
Ground
Ground
Ground
Chip Select Bar. Active low serial port operation.
Serial Clock. Clock input for use with SPI communication.
Serial Input. 16 bit serial communications input.
Output Low Side 6. Open drain output driver with internal reverse diode.
Output High Side 6. Open source output driver with internal reverse diode. Drain connected to
VS2’.
Connect to Ground for best thermal performance or leave unconnected.
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3
NCV7708F
MAXIMUM RATINGS
Rating
Power Supply Voltage (VS1, VS2)
(DC)
(AC), t < 500 ms, Ivsx > −2 A
Output Pin OUTHx
(DC)
(AC – inductive clamping)
Output Pin OUTLx
(DC)
(AC), t < 500 ms, IOUTLx > −2 A
(AC Inductive Clamping)
Pin Voltage (Logic Input pins, SI, SCLK, CSB, SO, EN, V
CC
)
Output Current (OUTL1, OUTL2, OUTL3, OUTL4, OUTL5, OUTL6, OUTH1, OUTH2, OUTH3, OUTH4,
OUTH5, OUTH6)
(DC) Vds = 12 V
(DC) Vds = 20 V
(DC) Vds = 40 V
(AC) Vds = 12 V, (50 ms pulse, 1 s period)
(AC) Vds = 20 V, (50 ms pulse, 1 s period)
(AC) Vds = 40 V, (50 ms pulse, 1 s period)
Electrostatic Discharge, Human Body Model, VS1, VS2, OUTx (Note 1)
Electrostatic Discharge, Human Body Model, all other pins
Electrostatic Discharge, Machine Model
Electrostatic Discharge, Charged Device Model
Short Circuit Reliability Characterization (AEC−Q10x)
Operating Junction Temperature
Storage Temperature Range
Moisture Sensitivity Level
Peak Reflow Soldering Temperature: Pb−Free, 60 to 150 seconds at 217°C (Note 2)
SOIC−28
SSOP−24 EPAD
Value
Unit
V
−0.3 to 40
−1.0
V
−0.3 to 40
−8.0
V
−0.3 to 36
−1.0
45
−0.3 to 5.5
V
A
−1.5 to 1.5
−0.7 to 0.7
−0.25 to 0.25
−2.0 to 2.0
−0.9 to 0.9
−0.3 to 0.3
4.0
2.0
200
1.0
GRADE A
−40 to 150
−55 to 150
MSL 3
MSL 2
260
kV
kV
V
kV
−
°C
°C
−
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Tested with a VS1/VS2 power supply common point.
2. For additional information, please see or download the ON Semiconductor Soldering and Mounting Techniques Reference Manual,
SOLDERRM/D.
THERMAL CONDITIONS
Test Conditions, Typical Value
Thermal Parameters
SOIC−28
Junction−to−Lead (psi−JL8,
Y
JL8
) or Pins 6−9, 20−23
Junction−to−Ambient (R
qJA
,
q
JA
)
SSOP−24 EPAD
Junction−to−Board (R
YB
)
Junction−to−Ambient (R
qJA
)
Junction−to−Lead (R
YJL
)
−
−
−
2
54
7
°C/W
°C/W
°C/W
10
78
11
63
°C/W
°C/W
Board Details (Note 3)
Board Details (Note 4)
Unit
3. 1−oz copper, 240 mm
2
copper area, 0.062″ thick FR4. This is the minimum pad board size.
4. 1−oz copper, 986 mm
2
copper area, 0.062″ thick FR4.
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4
NCV7708F
RECOMMENDED OPERATING CONDITIONS
Value
Rating
Digital Supply Input Voltage (V
CC
)
Battery Supply Input Voltage (V
S
)
DC Output Current (I(OUTLx), I(OUTHx))
Junction Temperature
Symbol
V
CCmax
V
Smax
DC
max
T
J
Min
3.15
5.5
−
−40
Max
5.25
28
0.5
150
Unit
V
V
A
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
ELECTRICAL CHARACTERISTICS
(−40°C < T
J
< 150°C, 5.5 V < VSx < 40 V, 3.15 V < V
CC
< 5.25 V, EN = V
CC
, unless otherwise specified)
Characteristic
GENERAL
Supply Current (VS1 + VS2)
Sleep Mode (Note 5)
I
vs_sleep
VS1 = VS2 = 13.2 V,
V
CC
= CSB = 5 V,
EN = SI = SCLK = 0 V
(−40°C to 85°C)
EN = V
CC
,
5.5 V < VSx < 35 V
No Load
CSB = V
CC
,
EN = SI = SCLK = 0 V
(−40°C to 85°C)
EN = CSB = V
CC
,
SI = SCLK = 0 V
EN = V
CC
,
5.5 V < VSx < 35 V
No Load
mA
Symbol
Test Conditions
Min
Typ
Max
Unit
−
1.0
2.5
Supply Current (VS1)
Active Mode
Supply Current (V
CC
) − Sleep Mode (Note 5)
I
vs1_act
−
−
1.25
1.0
2.5
2.5
mA
mA
I
vcc_sleep
Supply Current (V
CC
) − Active Mode
Supply Current (VS2)
Active Mode
V
CC
Power−On−Reset Threshold
VSx Undervoltage Detection Threshold
VSx Undervoltage Detection Hysteresis
VSx Overvoltage Detection Threshold
VSx Overvoltage Detection Hysteresis
Thermal Warning (Note 6)
Thermal Warning Hysteresis (Note 6)
Thermal Shutdown (Note 6)
Ratio of Thermal Shutdown to Thermal
Warning (Note 6)
OUTPUTS
Output High R
DS(on)
(source and sink)
I
vcc_act
I
vs2_act
−
1.5
3.0
mA
−
−
1.25
2.55
4.1
365
36.5
2.5
140
20
175
1.20
2.5
2.9
4.5
450
40.0
4.0
170
−
195
−
mA
V
V
mV
V
V
°C
°C
°C
−
V
CCpor
V
Suv
V
Suv_hys
V
Sov
V
Sov_hys
T
tw
T
tw_hys
T
tsd
T
tsd
/T
tw
VSx increasing
VSx decreasing
3.7
100
33
1
120
−
155
1.05
R
DSon_src
R
DSon_snk
I
src
I
out
= −500 mA
25°C
−40°C < T
J
< 150°C
OUTH(1−6) = 0 V,
Vsx = 40 V, V
CC
= 5 V
OUTH(1−6) = 0 V,
Vsx = 13.2 V, V
CC
= 5V
W
−
−
−5.0
−1.0
0.6
−
−
−
1.3
1.7
mA
−
−
Source Leakage Current
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. For temperatures above 85°C, refer to graphs for VSx and V
CC
Sleep Current vs. Temperature on page 17.
6. Thermal characteristics are not subject to production test.
7. Refer to “Typical High−Side Negative Clamp Voltage” graph on page 17.
8. Current limit is active with and without overcurrent detection.
9. Not production tested.
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5
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