NCP6951B
Camera PMIC with Flash
LED Driver
The NCP6951B integrated circuit is part of the ON Semiconductor
mini power management IC family. It is optimized to supply battery
powered portable application sub−systems such as camera function,
microprocessors... etc. This device integrates one high efficiency
600 mA Step−down DCDC converter with DVS (Dynamic Voltage
Scaling), 5 low dropout (LDO) voltage regulators and a 1.5 A Flash
LED driver in WLCSP24 package.
Features
♦
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MARKING
DIAGRAM*
6951B
AWLYWW
G
•
One Flash LED Driver:
Adaptive boost supply or bypass mode depending on V
in
and
V
flash
conditions
♦
Programmable flash current from 100 mA to 1.6 A by 100 mA
steps
♦
Programmable safety and inhibit timer to limit the flash duration
and protect the application
One DCDC Converter:
♦
Peak efficiency 96%
♦
Programmable output voltage from 0.8 V to 2.3 V by 50 mV steps
♦
600 mA output current capability
Five Low Noise − Low Dropout Regulators
♦
Programmable output voltage from 1.7 V to 3.3 V for LDOs 1,2,3
♦
Programmable output voltage from 1.2 V to 2.85 V for LDO 4 & 5
♦
200 mA output current capability: LDO’s 1, 2, 3 & 4
♦
300 mA output current capability: LDO 5
♦
45
mVrms
low output noise
Control
♦
400 kHz / 3.4 MHz I
2
C control interface
♦
Hardware enable pin
♦
Customizable power up sequencer
Extended Input Voltage Range 2.5 V to 5.5 V
♦
Support of newest battery technologies
Optimized Power Efficiency
♦
82
mA
very low quiescent current at no load
♦
Dynamic voltage scaling on DCDC converter
♦
Regulators can be supplied from DCDC converter output
Small Footprint
♦
Package WLCSP24 2.57 x 1.65 mm
2
♦
DCDC converter runs at 3.0 MHz using a 1
mH
inductor and
10
mF
capacitor or 2.2
mH
inductor and 4.7
mF
capacitor
WLCSP24
CASE 567JA
A
WL
Y
WW
G
•
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*Pb−Free indicator, “G” or microdot “
G”,
may or may not be present.
•
PIN ASSIGNMENT
PGND2
VOUT3
VOUT2
VIN1
VOUT1
PVIN1
A1
SW2
A2
FLSEL
A3
AGND
A4
SCL
A5
FB1
A6
SW1
B1
SW2
B2
FLEN
B3
AGND
B4
HWEN
B5
SDA
B6
PGND1
•
C1
VBST
C2
FL
C3
VBG
C4
VOUT4
C5
VIN2
C6
VOUT5
D1
D2
D3
D4
D5
D6
•
•
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 34 of
this data sheet.
•
Typical Applications
•
Cellular Phones
•
Digital Cameras
•
Personal Digital Assistant and Portable Media Player
•
GPS
©
Semiconductor Components Industries, LLC, 2015
1
November, 2015 − Rev. 0
Publication Order Number:
NCP6951/D
NCP6951B
NCP6951B
VBG
100nF
AGND
Core
DCDC 1
600mA
PVIN1
SW1
FB1
PGND1
2.2uF
System Supply
DCDC 1 Out
1uH
10uF
1.0uF
System Supply
System or
DCDC Supply
VIN1
VIN2
1uF
Thermal
Protection
Power Up &
Down
Sequencer
I@C
LDO1
200mA
LDO2
200mA
LDO3
200mA
LDO4
200mA
LDO5
300mA
VOUT1
VOUT2
VOUT3
1.0uF
1.0uF
1.0uF
Enabling
HWEN
SDA
VOUT4
VOUT 5
VBST
1.0uF
1.0uF
Processor I
@C
System or
DCDC Supply
4.7uF
SCL
SW2
1uH
Boost
Converter
1.5A LED
Driver
FL
1 x 22uF 0603 or
2 x 10uF 0402
PGND 2
Flash LED Current Select
PA transmit burst, Torch, etc
Flash Enable Signal
FLSEL
FLEN
LED Current
Select
Enabling
Flash LED
Flash
Control
1.5A LED
Driver
Figure 1. Functional Block Diagram
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2
NCP6951B
Table 1. PIN OUT DESCRIPTION
Pin
POWER
A4
VIN1
Power Input
Analog Supply. This pin is the device analog, digital and LDO 1, 2 & 3 supply. A 1.0
mF
ceramic
capacitor or larger must bypass this input to ground. This capacitor should be placed as close a
possible to this pin.
Reference Voltage. A 0.1
mF
ceramic capacitor must bypass this pin to the ground
Analog Ground. Analog and digital modules ground. Must be connected to the system ground.
Name
Type
Description
D3
B3, C3
VBG
AGND
Analog Input
Analog Ground
CONTROL AND SERIAL INTERFACE
C4
B4
C5
HWEN
SCL
SDA
Digital Input
Digital Input
Digital
Input/Output
Hardware Enable. Active high will enable the part; there is internal pull down resistor on this pin.
I
2
C interface
Clock
I
2
C interface
Data
DCDC CONVERTER
A6
B6
B5
C6
PVIN1
SW1
FB1
PGND1
Power Input
Power Output
Analog Input
Power Ground
DCDC Power Supply. This pin must be decoupled to ground by a 2.2
mF
ceramic capacitor. This
capacitor should be placed as close a possible to this pin .
DCDC Switch Power. This pin connects power transistors to one end of the inductor. Typical ap-
plication uses 1.0
mH
inductor; refer to application section for more information.
DCDC Feedback Voltage. Must be connected to the output capacitor. This is the input to the error
amplifier.
DCDC Power Ground. This pin is the power ground and carries the high switching current. High
quality ground must be provided to prevent noise spikes. To avoid high−density current flow in a
limited PCB track, a local ground plane is recommended.
LDO REGULATORS
A4
D5
A5
A3
A2
D4
D6
VIN1
VIN2
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
Power Input
Power Input
Power Output
Power Output
Power Output
Power Output
Power Output
LDO 1, 2 & 3 Power and Core supply (see Power table)
LDO 4 & 5 Power Supply. This pin requires a 1
mF
decoupling capacitor.
LDO 1 Output Power. This pin requires a 1
mF
decoupling capacitor.
LDO 2 Output Power. This pin requires a 1
mF
decoupling capacitor.
LDO 3 Output Power. This pin requires a 1
mF
decoupling capacitor.
LDO 4 Output Power. This pin requires a 1
mF
decoupling capacitor.
LDO 5 Output Power. This pin requires a 1
mF
decoupling capacitor.
FLASH LED DRIVER
D1
B1, C1
A1
VBST
SW2
PGND2
Power Output
Power Output
Power Ground
Flash Led Driver Boost Output. This pin is the output of the boost converter. It requires a 10
mF
decoupling capacitor.
Flash Led Driver Switch Power. This pin connects power transistors to one end of the inductor.
Typical application uses 1.0
mH
inductor; refer to application section for more information.
Flash Led Driver Power Ground. This pin is the power ground and carries the high switching cur-
rent. High quality ground must be provided to prevent noise spikes. To avoid high−density current
flow in a limited PCB track, a local ground plane is recommended.
Flash Led Driver Output Power. This pin is the output of the current source of the flash LED driv-
er. It needs a flash led to connect.
Flash Led Driver Select Pin. Active high will select the reduced flash level.
Flash Led Driver Enable Pin. Active high will enable the flash mode.
D2
B2
C2
FL
FLSEL
FLEN
Power Output
Logic Input
Logic Input
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NCP6951B
Table 2. MAXIMUM RATINGS
Rating
Analog and power pins: AVIN, PVIN, SW, VIN1, VIN2, VOUT1, VOUT2,
VOUT3, VOUT4, VOUT5, FB, VBG Pins
Digital pins: SCL, SDA, HWEN Pin:
Storage Temperature Range
Maximum Junction Temperature
Moisture Sensitivity (Note 1)
Human Body Model (HBM) ESD Rating (Note 2)
Charged Device Model (CDM) ESD Rating (Note 2)
Input Voltage
Input Current
Symbol
V
A
V
DG
I
DG
T
STG
T
JMAX
MSL
ESD
HBM
ESD
CDM
Value
−0.3 to + 6.0
−0.3 to V
A
+0.3
≤
6.0
10
−65 to + 150
−40 to +150
Level 1
2000
1000
Unit
V
V
mA
°C
°C
−
V
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The thermal shutdown set to 150°C (typical) avoids potential irreversible damage on the device due to power dissipation.
2. This device series contains ESD protection and passes the following ratings:
Human Body Model (HBM) per JEDEC standard: JESD22−A114
Charged Device Model (CDM) per JEDEC standard: JESD22−C101.
Table 3. RECOMMENDED OPERATING CONDITIONS
Symbol
V
IN1
PV
IN
V
IN2
T
A
T
J
R
qJA
P
D
Parameter
Core Power Supply, DCDC power supply and
LDOs 1, 2 & 3
LDOs 4 & 5 Input Voltage range
Ambient Temperature Range
Junction Temperature Range (Note 6)
Thermal Resistance Junction to Case
Power Dissipation Rating (Note 4)
T
A
= 25°C
T
A
= 85°C
L
Co
Inductor for DCDC converter (Note 4)
Output Capacitor for DCDC Converter (Note 4)
Output Capacitors for LDO (Note 4)
C
BG
Cpvin
Cvin1
Cvin2
V
FL
Output Capacitors for V
BG
Input Capacitor for DCDC Converter (Note 4)
Input Capacitor for Vin1 (Note 4)
Input Capacitor for Vin2 (Note 4)
LED Voltage
Lowest torch setting
I
FL
= 1 A
I
FL
= 1 A
2.0
2.8
3.3
0.65
Conditions
Min
2.5
1.7
−40
−40
−
−
−
1
10
1
100
2.2
1
1
4.5
4.9
25
25
80
1250
500
Typ
Max
5.5
5.5
+ 85
+125
−
−
−
2.2
Unit
V
V
°C
°C
°C/W
mW
mW
mH
mF
mF
nF
mF
mF
mF
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
4. Refer to the Application Information section of this data sheet for more details.
5. The R
qCA
is dependent of the PCB heat dissipation. Board used to drive this data was a NCP6951EVB board. It is a multilayer board with
1−ounce internal power and ground planes and 2−ounce copper traces on top and bottom of the board.
6. The maximum power dissipation (P
D
) is dependent by input voltage, maximum output current and external components selected.
R
qJA
+
125
*
T
A
P
D
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NCP6951B
Table 4. ELECTRICAL CHARACTERISTICS
Min & Max Limits apply for T
J
up to +125°C unless otherwise specified. PVIN = V
IN1
= V
IN2
= 3.6 V (Unless otherwise noted). DCDC Output Voltage = 1.2V, LDO1, 2 & 4= 2.8 V, LDO 3 & 5 = 1.8 V, Typical values are
referenced to T
J
= + 25°C and default configuration (Note 9).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
SUPPLY CURRENT: Pins VIN1, VIN2, PVIN
I
Q
Operating quiescent current
DCDC on – no load – no switching
LDOs off
T
A
= up to +85°C
DCDC on – no load – no switching
LDOs on – no load
T
A
= up to +85°C
DCDC Off
LDOs on – no load
T
A
= up to +85°C
I
SLEEP
Product sleep mode current
HWEN on
All DCDC and LDOs off
V
IN
= 2.5 V to 5.5 V
T
A
= up to +85°C
HWEN off
I
2
C interface disabled
V
IN
= 2.5 V to 5.5 V
T
A
= up to +85°C
−
32
−
mA
−
80
−
−
55
−
mA
−
6.0
−
I
OFF
Product off current
mA
−
0.7
−
DCDC CONVERTER
PV
IN
I
OUTMAX
D
VOUT
DC
OUT
F
SW
R
ONHS
R
ONLS
I
PK
Input Voltage Range
Maximum Output Current
Output Voltage DC Error
DCDC Output Voltage
Switching Frequency
P−Channel MOSFET ON Resistance
N−Channel MOSFET ON Resistance
Peak Inductor Current
Load Regulation
Line Regulation
D
t
START
R
DISDCDC
Maximum Duty Cycle
Soft−Start Time
DCDC Active Output Discharge
From HWEN to 90% of Output Volt-
age (Note 10)
From PVIN1 to SW1 pins,
Pvin1 = 3.6 V
From SW1 to PGND1 pins,
Pvin1 = 3.6 V
Open loop
2.5 V
≤
PV
IN
≤
5.5 V
I
OUT
from 300 mA to I
OUTMAX
I
OUT
= 100 mA
2.5 V
≤
V
IN
≤
5.5 V
Io=300 mA, PWM mode (Note 9)
Programmable 50 mV steps (Note 9)
2.5
0.6
−1
0.8
2.7
−
−
1.0
−
−
−
−
−
3
185
335
1.35
−0.5
0
100
128
7.0
−
−
−
0
5.5
−
1
2.3
3.3
−
−
1.7
−
−
−
V
A
%
V
MHz
mW
mW
A
%/A
%/V
%
ms
W
LDO1, LDO2, LDO3
V
IN1
I
OUTMAX1,2,3
I
LIM1,2,3
I
SC1,2,3
V
out1,2,3
LDO1, LDO2, LDO3 Input Voltage
Range
Maximum Output Current
Output Current Limitation
Short Circuit Protection
Output Voltage
Programmable, see table. (Note 9)
(Note 9)
2.5
200
−
−
1.7
−
−
−
130
5.5
−
500
−
3.3
V
mA
mA
mA
V
7. Devices that use non−standard supply voltages which do not conform to the intent I
2
C bus system levels must relate their input levels to
the V
DD
voltage to which the pull−up resistors R
P
are connected.
8. Refer to the Application Information section of this data sheet for more details.
9. Guaranteed by design and characterized.
10. Tested in production at V
OUT
= 2.0 V.
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