CM3202-02
DDR VDDQ and VTT
Termination Voltage
Regulator
Product Description
The CM3202−02 is a dual−output low noise linear regulator
designed to meet SSTL−2 and SSTL−3 specifications for
DDR−SDRAM V
DDQ
supply and termination voltage V
TT
supply.
With integrated power MOSFETs the CM3202−02 can source up to
2 A of VDDQ continuous current, and source or sink up to 2 A VTT
continuous current. The typical dropout voltage for VDDQ is 500 mV
at 2 A load current.
The CM3202−02 provides excellent full load regulation and fast
response to transient load changes. It also has built−in over−current
limits and thermal shutdown at 170°C.
The CM3202−02 supports Suspend−To−RAM (STR) and ACPI
compliance with Shutdown Mode which tri−states VTT to minimize
quiescent system current.
The CM3202−02 is available in a space saving WDFN8 surface
mount packages. Low thermal resistance allows them to withstand
high power dissipation at 85°C ambient. The CM3202−02 can operate
over the industrial ambient temperature range of –40°C to 85°C.
Features
http://onsemi.com
1
WDFN8
DE SUFFIX
CASE 511BH
MARKING DIAGRAM
CM320
202DE
CM320 202DE = CM3202−02DE
•
Two Linear Regulators
•
Maximum 2 A Current from VDDQ
•
Source and Sink Up to 2 A VTT Current
•
1.7 V to 2.8 V Adjustable VDDQ Output Voltage
•
0.85 V to 1.4 V VTT Output Voltage (Tracking at 50% of VDDQ)
•
500 mV Typical VDDQ Dropout Voltage at 2 A
•
Excellent Load and Line Regulation, Low Noise
•
Meets JEDEC DDR−I and DDR−II Memory Power Spec
•
Linear Regulator Design Requires no Inductors and Has Low
•
•
•
•
•
•
•
•
•
•
External Component Count
Integrated Power MOSFETs
Dual Purpose ADJ/Shutdown Pin
Built−In Over−Current Limit and Thermal Shutdown for V
DDQ
and V
TT
Fast Transient Response
Low Quiescent Current
These Devices are Pb−Free and are RoHS Compliant
DDR Memory and Active Termination Buses
Desktop Computers, Servers
Residential and Enterprise Gateways
DSL Modems
ORDERING INFORMATION
Device
CM3202−02DE
Package
WDFN8
(Pb−Free)
Shipping
†
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Applications
•
•
•
•
Routers and Switches
DVD Recorders
3D AGP Cards
LCD TV and STB
©
Semiconductor Components Industries, LLC, 2011
March, 2011
−
Rev. 3
1
Publication Order Number:
CM3202−02/D
CM3202−02
TYPICAL APPLICATION
V
IN
= 3.3 V to 3.6 V
C
IN
220
mF/
10 V
1
2
V
TT
= 1.25 V / 2A
C
TT
220
mF/
10 V
4.7
mF/
10 V
cer
3
4
VIN
NC
VTT
NC
4.7
mF/10
V
cer
V
DDQ
= 2.5 V/2 A
C
DDQ
4.7
mF/10
V, cer
220
mF/
10 V
Chip
Set
VDDQ
VDDQ
VDDQ
ADJSD
CM3202
8
7
DL0
RT0
DLn
RTn
R1
10 k
GND 6
GND
VTT
5
S/D
R2
10 k
1.25 V, 2.5 A
1k
V
REF
0.1
mF/10
V
cer
DDR
REF MEMORY
FUNCTIONAL BLOCK DIAGRAM
VIN
ADJSD
ADDQ
+
-
OTP &
Shutdown
UVLO &
Bandgap
R
+
-
R
Vref1
+
-
Current
Limit
Vref
Current
Limit
Current
Limit
VTT
GND
CM3202−02
http://onsemi.com
2
CM3202−02
PACKAGE / PINOUT DIAGRAMS
Top View
(Pins Down View)
Pin 1
Marking
VIN
NC
VTT
NC
1
2
3
4
CM320
202DE
8
7
6
5
Thermal Pad
VDDQ
ADJSD
GND
GND
8−Lead WDFN Package
CM3202−02DE
Table 1. PIN DESCRIPTIONS
Pin(s)
1
2
3
4
5
6
7
Name
VIN
NC
VTT
NC
GND
GND
ADJSD
Description
Input supply voltage pin. Bypass with a 220
mF
capacitor to GND.
Not internally connected. For better heat flow, connect to GND (exposed pad).
V
TT
regulator output pin, which is preset to 50% of V
DDQ
.
Not internally connected. For better heat flow, connect to GND (exposed pad).
Ground pin (analog).
Ground pin (power).
This pin is for V
DDQ
output voltage adjustment. It is available as long as V
DDQ
is enabled.
During Manual/Thermal shutdown, it is tightened to GND. The V
DDQ
output voltage is set
using an external resistor divider connected to ADJSD:
V
DDQ
= 1.25 V
×
((R1 + R2) / R2)
Where R1 is the upper resistor and R2 is the ground−side resistor. In addition, the ADJSD pin functions as a
Shutdown pin. When ADJSD voltage is higher than 2.7 V (SHDN_H), the circuit is in Shutdown mode. When
ADJSD voltage is below 1.5 V (SHDN_L), both VDDQ and VTT are enabled. A low−leakage Schottky diode in
series with ADJSD pin is recommended to avoid
interference with the voltage adjustment setting.
8
EPad
VDDQ
GND
VDDQ regulator output voltage pin.
The backside exposed pad which serves as the package heatsink. Must be connected to GND.
http://onsemi.com
3
CM3202−02
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
VIN to GND
Pin Voltages
V
DDQ
, V
TT
to GND
ADJSD to GND
Output Current
VDDQ / VTT, continuous (Note 1)
VDDQ / VTT, peak
VDDQ Source + VTT Source
Temperature
Operating Ambient
Operating Junction
Storage
Thermal Resistance, R
JA
(Note 2)
Continuous Power Dissipation (Note 2)
WDFN8, T
A
= 25°C / 85°C
ESD Protection (HBM)
Lead Temperature (soldering, 10 sec)
Rating
[GND
−
0.3] to +6.0
[GND
−
0.3] to +6.0
[GND
−
0.3] to +6.0
2.0 /
±2.0
2.8 /
±2.8
3
–40 to +85
–40 to +170
–40 to +150
55
2.6 / 1.5
2000
300
Units
V
V
A
°C
°C
/ W
W
V
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Despite the fact that the device is designed to handle large continuous/peak output currents, it is not capable of handling these under all
conditions. Limited by the package thermal resistance, the maximum output current of the device cannot exceed the limit imposed by the
maximum power dissipation value.
2. Measured with the package using a 4 in
2
/ 2 layers PCB with thermal vias.
Table 3. STANDARD OPERATING CONDITIONS
Parameter
Ambient Operating Temperature Range
VDDQ Regulator
Supply Voltage, VIN
Load Current, Continuous
Load Current, Peak (1 sec)
C
DDQ
VTT Regulator
Supply Voltage, VIN
Load Current, Continuous
Load Current, Peak (1 sec)
C
TT
VIN Supply Voltage Range
VDDQ Source + VTT Source
Load Current, Continuous
Load Current, Peak (1 sec)
Junction Operating Temperature Range
Rating
–40 to +85
3.0 to 3.6
0 to 2
2.5
220
3.0 to 3.6
0 to
±2.0
±2.50
220
3.0 to 3.6
2.5
3.5
–40 to +150
Units
°C
V
A
A
mF
V
A
A
mF
V
A
°C
http://onsemi.com
4
CM3202−02
SPECIFICATIONS (Cont’d)
Table 4. ELECTRICAL OPERATING CHARACTERISTICS
(Note 1)
Symbol
General
VIN
I
Q
V
ADJSD
I
SHDN
SHDN_H
SHDN_L
UVLO
T
OVER
T
HYS
TEMPCO
Supply Voltage Range
Quiescent Current
ADJSD Voltage
Shutdown Current
ADJSD Logic High
ADJSD Logic Low
Under−Voltage Lockout
Thermal SHDN Threshold
Thermal SHDN Hysteresis
V
DDQ
, V
TT
TEMPCO
VDDQ Output Voltage
VDDQ Load Regulation
VDDQ Line Regulation
VDDQ Dropout Voltage
ADJSD Bias Current
VDDQ Current Limit
I
OUT
= 1 A
I
DDQ
= 100 mA
10 mA
≤
I
DDQ
≤
2 A (Note 3)
3.0 V
≤
VIN
≤
3.6 V, I
DDQ
= 0.1 A
I
DDQ
= 2 A (Note 4)
(Note 3)
2.0
2.450
Hysteresis = 100 mV
2.40
150
2.70
170
50
80
V
ADJSD
= 3.3 V (Shutdown) (Note 3)
(Note 2)
2.7
1.5
2.90
I
DDQ
= 0, I
TT
= 0
1.225
3.0
7
1.250
0.2
3.6
15
1.275
0.5
V
mA
V
mA
V
V
V
°C
°C
ppm/°C
Parameter
Conditions
Min
Typ
Max
Units
VDDQ Regulator
V
DDQ DEF
V
DDQ LOAD
V
DDQ LINE
V
DROP
I
ADJ
I
DDQ LIM
V
TT DEF
V
TT LOAD
V
TT LINE
I
TT LIM
I
VTT OFF
2.500
10
5
500
0.8
2.5
3.0
2.550
25
25
V
mV
mV
mV
mA
A
VTT Regulator
VTT Output Voltage
VTT Load Regulation
VTT Line Regulation
ITT Current Limit
VTT Shutdown Leakage Current
I
TT
= 100 mA
Source, 10 mA
≤
I
TT
≤
2 A (Note 3)
Sink,
−2A
≤
I
TT
≤
10 mA (Note 3)
3.0 V
≤
VIN
≤
3.6 V, I
TT
= 0.1 A
Source / Sink (Note 3)
V
ADJSD
= 3.3 V (Shutdown)
±2.0
1.225
–30
1.250
10
–10
5
±2.5
10
1.275
30
15
V
mV
mV
mV
A
mA
1. VIN = 3.3 V, V
DDQ
= 2.50 V, VTT = 1.25 V (default values), C
DDQ
= C
TT
= 47
mF,
T
A
= 25°C unless otherwise specified.
2. The ADJSD Logic High value is normally satisfied for full input voltage range by using a low leakage current (below 1
mA).
Schottky diode
at ADJSD control pin.
3. Load and line regulation are measured at constant junction temperature by using pulse testing with a low duty cycle. For high current tests,
correlation method can be used. Changes in output voltage due to heating effects must be taken into account separately. Load and line
regulation values are guaranteed by design up to the maximum power dissipation.
4. Dropout voltage is the input to output voltage differential at which output voltage has dropped 100 mV from the nominal value obtained at
3.3 V input. It depends on load current and junction temperature. Guaranteed by design.
http://onsemi.com
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
