NCP1602
Enhanced, High-Efficiency
Power Factor Controller
The 6−pin PFC controller NCP1602 is designed to drive PFC boost
stages. It is based on an innovative
Valley
Synchronized Frequency
Fold−back
(VSFF) method. In this mode, the circuit classically
operates in
Critical
conduction
Mode
(CrM) when
V
control
voltage
exceeds a programmable value
V
ctrl,FF
. When
V
control
is below this
preset level
V
ctrl,FF
, the NCP1602 (versions [B**] and [D**]) linearly
decays the frequency down to about 30 kHz until
V
control
reaches the
SKIP mode threshold.
VSFF
maximizes the efficiency at both
nominal and light load. In particular, the stand−by losses are reduced
to a minimum. Like in
FCCrM
controllers, internal circuitry allows
near−unity power factor even when the switching frequency is
reduced. Housed in a TSOP6 package, the circuit also incorporates the
features necessary for robust and compact PFC stages, with few
external components.
General Features
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1
TSOP−6
SN SUFFIX
CASE 318G
MARKING DIAGRAM
AEA AYWG
G
1
AEA
A
Y
W
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
•
•
•
•
•
•
•
•
•
•
•
Near−Unity Power Factor
Two−Level Boost Follower Line Level Dependent (disabled by default)
Critical Conduction Mode (CrM)
Valley Synchronized Frequency
Fold−back
(VSFF): Low Frequency
Operation is Forced at Low Current Levels (9 pre−programmed settings).
•
Works With or Without a Transformer w/ ZCD Winding (simple inductor)
On−time Modulation to Maintain a Proper Current Shaping in VSFF Mode
Skip Mode at Very Low Load Current (versions[ B**] and [D**])
Fast Line / Load Transient Compensation
(Dynamic Response Enhancer)
(Note: Microdot may be in either location)
PIN CONNECTIONS
VCTRL
GND
CS / ZCD
1
2
3
(Top View)
6
5
4
FB
V
CC
DRV
Valley Turn−on
High Drive Capability: −500 mA / +800 mA
V
CC
Range: from 9.5 V to 30 V
Low Start−up Consumption for:
[**C] & [**D] Versions: Low
Vcc
Start−up level (10.5 V)
[**A] & [**B] Versions: High
Vcc
Start−up level (17.0 V)
•
Line Range Detection for Reduced Crossover Frequency Spread
•
This is a Pb−Free Device
Safety Features
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
•
•
•
•
•
•
•
•
•
Thermal Shutdown
Non−latching, Over−Voltage Protection
Second Over−Voltage Protection
Brown−Out Detection
Soft−Start for Smooth Start−up Operation ([**C] &
[**D] Versions)
Over Current Limitation
Disable Protection if the Feedback Pin is Not Connected
Low Duty−Cycle Operation if the Bypass Diode is
Shorted
Open Ground Pin Fault Monitoring
Typical Applications
•
•
•
•
PC Power Supplies
Lighting Ballasts (LED, Fluorescent)
Flat TV
All Off Line Appliances Requiring Power Factor
Correction
©
Semiconductor Components Industries, LLC, 2015
1
October, 2015 − Rev. 0
Publication Order Number:
NCP1602/D
NCP1602
DEVICE ORDERING INFORMATION
Operating Part Number (OPN)
NCP1602ABASNT1G
NCP1602AEASNT1G
NCP1602DCCSNT1G
NCP1602DFCSNT1G
NOTE:
Marking (L
1
, L
2
, L
3
)
ABA
AEA
DCC
DFC
TSOP−6
(Pb−Free)
Package Type
Tape and Reel Size
Other L
1
, L
2
, L
3
combinations are available upon request.
Product versions are coded with three letters (L
1
,L
2
,L
3
).
Table 1. NCP1602 1
st
LETTER CODING OF PRODUCT VERSIONS
L
1
A
B
C
D
Brown−out Function
NO
NO
YES (trim)
YES (trim)
Skip Mode Function
NO
YES (trim)
NO
YES (trim)
Table 2. NCP1602 2
nd
LETTER CODING OF PRODUCT VERSIONS
L
2
B
C
E
F
CrM to DCM V
CTRL
Threshold (V)
1.026
1.296
1.553
2.079
t
ON,max,LL
(ms)
25
25
12.5
12.5
t
ON,max,HL
(ms)
8.33
8.33
4.17
4.17
Table 3. NCP1602 3
rd
LETTER CODING OF PRODUCT VERSIONS
L
3
A
B
C
D
V
CC
Startup Level (V)
17.0
17.0
10.5
10.5
2−Level Boost Follower Feature
NO
YES (trim)
NO
YES (trim)
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NCP1602
V
in
I
L
L1
D1
Vbulk
R
fb1
AC line
C
in
EMI
Filter
R
z
C
z
R
cs1
VCTRL
GND
2
5
4
FB
1
6
C
bulk
LOAD
Q1
VCC
DRV
CS / ZCD
3
C
p
R
cszcd
R
cs2
R
sense
R
fb2
Figure 1. NCP1602 Application Schematic
Table 4. DETAILED PIN DESCRIPTION
Pin Number
1
Name
VCTRL
Function
The error amplifier output is available on this pin. The network connected between this pin
and ground adjusts the regulation loop bandwidth that is typically set below 20 Hz to achieve
high Power Factor ratios.
VCTRL pin is internally pulled down when the circuit is off so that when it starts operation, the
power increases slowly to provide a soft−start function.
VCTRL pin must not be controlled or pulled down externally.
Connect this pin to the PFC stage ground.
This pin monitors the MOSFET current to limit its maximum current.
This pin is the output of a resistor bridge connected between the drain and the source of the
power MOSFET. Internal circuitry takes care of extracting
V
in
, V
out
, I
ind
and ZCD
The high−current capability of the totem pole gate drive (−0.5/+0.8A) makes it suitable to
effectively drive high gate charge power MOSFETs.
This pin is the positive supply of the IC. The circuit starts to operate when VCC exceeds
17.0 V ([**A] & [**B] Versions) or 10.5 V ([**C] & [**D] Versions) and turns off when VCC
goes below 9.0 V (typical values). After start−up, the operating range is 9.5 V up to 30 V.
This pin receives a portion of the PFC output voltage for the regulation and the Dynamic
Response Enhancer (DRE) that drastically speeds−up the loop response when the output
voltage drops below 95.5% of the desired output level.
FB pin voltage
V
FB
is also the input signal for the (non−latching) Over−Voltage (OVP) and
Under−Voltage (UVP) comparators. The UVP comparator prevents operation as long as FB
pin voltage is lower than V
UVPH
internal voltage reference. A SOFTOVP comparator gradual-
ly reduces the duty−ratio when FB pin voltage exceeds 105% of
V
REF
. If the output voltage
still increases, the driver is immediately disabled if the output voltage exceeds 107% of the
desired level (fast OVP).
A 250−nA sink current is built−in to trigger the UVP protection and disable the part if the feed-
back pin is accidently open.
2
3
GND
CS / ZCD
4
5
DRV
VCC
6
FB
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NCP1602
Table 5. MAXIMUM RATINGS TABLE
Symbol
VCTRL
CS/ZCD
DRV
VCC
VCC
FB
P
D
R
qJA
T
J
T
J,max
T
S,max
T
L,max
MSL
Pin
1
3
4
5
5
6
Rating
V
CONTROL
pin
CS/ZCD Pin
Driver Voltage
Driver Current
Power Supply Input
Maximum (dV/dt) that can be applied to VCC
Feedback Pin
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @ T
A
=70°C
Thermal Resistance Junction to Air
Operating Junction Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10 s)
Moisture Sensitivity Level
ESD Capability, HBM model (Note 1)
ESD Capability, Charged Device Model (Note 1)
Value
−0.3, V
ctrl,max
(*)
−0.3, +9
−0.3, V
DRV
(*)
−500, +800
−0.3, + 30
TBD upon test engineer
measurements
−0.3, +9
550
145
−40 to+125
150
−65 to 150
300
1
> 2000
> 1500
Unit
V
V
V
mA
V
V/s
V
mW
°C/W
°C
°C
°C
°C
−
V
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*“V
ctrl,max
” is the VCTRL pin clamp voltage. “V
DRV
” is the DRV clamp voltage (V
DRVhigh
) if V
CC
is higher than (V
DRVhigh
). “V
DRV
” is V
CC
otherwise.
1. This device(s) contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per JEDEC Standard JESD22−A114E
Charged Device Model Method 1500 V per JEDEC Standard JESD22−C101E.
2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
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NCP1602
Table 6. TYPICAL ELECTRICAL CHARACTERISTICS
(Conditions: V
CC
= 18 V, T
J
from −40°C to +125°C, unless otherwise specified) (Note 3)
Symbol
START−UP AND SUPPLY CIRCUIT
V
CC,on
Start−Up Threshold,
V
CC
increasing:
[**C] & [**D] Versions
[**A] & [**B] Versions
Minimum Operating Voltage, V
CC
falling
Hysteresis (V
CC
,on
−
V
CC
,off
)
[**C] & [**D] Versions
[**A] & [**B] Versions
Maximum Start−Up Current, for V
CC
lower than 9.4 V, below startup voltage
Operating Consumption, no switching.
Operating Consumption, 50−kHz switching, no load on DRV pin
V
9.75
15.80
8.50
0.75
6.00
−
−
−
10.50
17.00
9.00
1.50
8.00
−
0.5
2.00
11.25
18.20
9.50
−
−
480
1.00
3.00
mA
mA
mA
V
V
Rating
Min
Typ
Max
Unit
V
CC,off
V
CC,hyst
I
CC,start
I
CC,op1
I
CC,op2
FREQUENCY FOLD−BACK DEAD TIME FOR CONFIGURATIONS L
2
= B, E, H @ K
m
= 2.28
t
DT,B,1
t
DT,B,2
t
DT,E,1
t
DT,E,2
t
DT,C,1
t
DT,C,2
t
DT,F,1
t
DT,F,2
Dead−Time,
V
ctrl
= 0.65V w/ B config
Dead−Time,
V
ctrl
= 0.75V w/ B config
Dead−Time,
V
ctrl
= 0.65V w/ E config
Dead−Time,
V
ctrl
= 0.75V w/ E config
Dead−Time,
V
ctrl
= 0.65V w/ C config
Dead−Time,
V
ctrl
= 0.75V w/ C config
Dead−Time,
V
ctrl
= 0.65V w/ F config
Dead−Time,
V
ctrl
= 0.75V w/ F config
5.73
2.91
9.96
6.70
8.90
5.69
13.00
9.97
7.64
3.88
13.28
8.93
11.90
7.50
17.30
13.10
9.55
4.85
16.60
10.80
14.84
9.48
21.66
16.61
ms
ms
ms
ms
ms
ms
ms
ms
CrM TO DCM THRESHOLD AND HYSTERESIS
V
ctrl,th,B
V
ctrl,th,E
V
ctrl,th,C
V
ctrl,th,F
V
ctrl
threshold CrM to DCM mode w/ B config
V
ctrl
threshold CrM to DCM mode w/ E config
V
ctrl
threshold CrM to DCM mode w/ C config
V
ctrl
threshold CrM to DCM mode w/ F config
0.923
1.398
1.16
1.865
1.026
1.553
1.29
2.08
1.129
1.708
1.43
2.29
V
V
V
V
SKIP CONTROL ([B**] & [D**] Versions)
V
SKIP−H
V
SKIP−L
V
SKIP−Hyst
GATE DRIVE
t
R
t
F
R
OH
R
OL
V
DRV,low
V
DRV,high
REGULATION BLOCK
V
REF
V
REF2,HL
V
REF2,LL
I
EA
Feedback Voltage Reference
Feedback Voltage Reference #2 @ High Line
Feedback Voltage Reference #2 @ Low Line
Error Amplifier Current Capability, Sinking and Sourcing
2.44
2.44
1.56
15
2.50
2.50
1.60
20
2.56
2.56
1.64
26
V
V
V
mA
Output voltage rise−time @
C
L
= 1 nF, 10−90% of output signal
Output voltage fall−time @
C
L
= 1 nF, 10−90% of output signal
Source resistance @ 200 mV under High VCC
Sink resistance @200 mV above Low VCC
DRV pin level for
V
CC
=
V
CC,off
+200 mV (10−kΩ resistor between DRV and GND)
DRV pin level at
V
CC
= 30 V (R
L
= 33 kΩ &
C
L
= 1 nF)
−
−
−
−
8.0
10
30
20
10
7
−
12
−
−
−
−
−
14
ns
ns
Ω
Ω
V
V
V
ctrl
pin SKIP Level, V
control
rising
V
ctrl
pin SKIP Level, V
control
falling
V
ctrl
pin SKIP Hysteresis
555
516
−
617
593
30
678
665
−
mV
mV
mV
3. The above specification gives the targeted values of the parameters. The final specification will be available once the complete circuit
characterization has been performed.
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