NCV7351, NCV7351F
High Speed CAN, CAN FD
Transceiver
The NCV7351 CAN transceiver is the interface between a
controller area network (CAN) protocol controller and the physical
bus and may be used in both 12 V and 24 V systems. The transceiver
provides differential transmit capability to the bus and differential
receive capability to the CAN controller.
The NCV7351 is an addition to the CAN high−speed transceiver
family complementing NCV734x CAN stand−alone transceivers and
previous generations such as AMIS42665, AMIS3066x, etc. The
NCV7351F is an addition to the family based on NCV7351
transceiver with improved bit timing symmetry behavior to cope with
CAN flexible data rate requirements (CAN FD).
Due to the wide common−mode voltage range of the receiver inputs
and other design features, the NCV7351 is able to reach outstanding
levels of electromagnetic susceptibility (EMS). Similarly, extremely
low electromagnetic emission (EME) is achieved by the excellent
matching of the output signals.
Key Features
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MARKING DIAGRAM
8
8
1
SOIC−8
CASE 751AZ
NV7351−y
ALYW
G
1
•
Compatible with the ISO 11898−2 Standard
•
High Speed (up to 1 Mbps)
•
NCV7351F Version Has Specification for Loop Delay Symmetry
•
•
•
•
•
•
•
•
•
•
(up to 2 Mbps according to ISO11898−2, up to 5 Mbps for
information only)
V
IO
Pin on NCV7351(F)D13 Version Allowing Direct Interfacing
with 3 V to 5 V Microcontrollers
EN Pin on NCV7351D1E Version Allowing Switching the
Transceiver to a Very Low Current OFF Mode
Excellent Electromagnetic Susceptibility (EMS) Level Over Full
Frequency Range. Very Low Electromagnetic Emissions (EME) Low
EME also Without Common Mode (CM) Choke
Bus Pins Protected Against >15 kV System ESD Pulses
Transmit Data (TxD) Dominant Time−out Function
Under all Supply Conditions the Chip Behaves Predictably. No
Disturbance of the Bus Lines with an Unpowered Node
Bus Pins Short Circuit Proof to Supply Voltage and Ground
Bus Pins Protected Against Transients in an Automotive
Environment
Thermal Protection
These are Pb−Free Devices
NV7351−y / NV7351Fy
y
= 3, 0, or E
F
= Flexible data rate version
(no dash used for CAN FD version)
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
PIN ASSIGNMENT
1
TxD
2
GND
3
V
CC
4
RxD
NCV7351(F)D13R2G
1
TxD
2
GND
3
V
CC
4
RxD
NCV7351D10R2G
1
TxD
2
GND
3
V
CC
4
RxD
NCV7351D1ER2G
7
CANH
6
CANL
5
EN
NCV7351−E
8
S
7
CANH
6
CANL
5
NC
NCV7351−0
8
S
7
CANH
6
CANL
5
V
IO
NCV7351−3
8
S
Quality
•
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
Typical Applications
•
Automotive
•
Industrial Networks
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
©
Semiconductor Components Industries, LLC, 2016
1
June, 2016 − Rev. 3
Publication Order Number:
NCV7351/D
NCV7351, NCV7351F
Table 1. KEY TECHNICAL CHARACTERISTICS AND OPERATING RANGES
Symbol
V
CC
V
UV
V
CANH
V
CANL
V
CANH,L
V
CANH,Lmax
Parameter
Power supply voltage
Undervoltage detection voltage
on pin V
CC
DC voltage at pin CANH
DC voltage at pin CANL
DC voltage between CANH and
CANL pin
DC voltage at pin CANH and
CANL during load dump
condition
Electrostatic discharge voltage
Differential bus output voltage
in dominant state
Input common−mode range for
comparator
Supply current
Supply current in silent mode
Propagation delay TxD to RxD
Junction temperature
See Figure 5
0 < V
CC
< 5.5 V; no time limit
0 < V
CC
< 5.5 V; no time limit
0 < V
CC
< 5.5 V
0 < V
CC
< 5.5 V, less than one second
Conditions
Min
4.5
3.5
−50
−50
−50
−
Max
5.5
4.5
+50
+50
+50
+58
Unit
V
V
V
V
V
V
V
ESD
V
O(dif)(bus_dom)
CM−range
I
CC
I
CCS
t
pd
T
J
IEC 61000−4−2 at pins CANH and
CANL
45
W
< R
LT
< 65
W
Guaranteed differential receiver thresh-
old and leakage current
Dominant; V
TxD
= 0 V
Recessive; V
TxD
= V
CC
−15
1.5
−30
−
2.5
1.4
45
−40
+15
3
+35
72
7.5
3.5
245
+150
kV
V
V
mA
mA
ns
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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NCV7351, NCV7351F
BLOCK DIAGRAM
V
IO
/NC(2)
5
V
IO
(3)
NCV7351
V
CC
3
7
CANH
1
TxD
Timer
Thermal
shutdown
8
S
6
CANL
Mode control
Driver
control
5
EN(1)
2
4
RxD
COMP
GND
(1) Only present in the NCV7351D1E
(2) VIO for version NCV7351D13
NC for version NCV7351D10
(3) Internally connected to V
CC
on versions without V
IO
pin
Figure 1. Block Diagram of NCV7351
Table 2. NCV7351: PIN FUNCTION DESCRIPTION
Pin
Number
1
2
3
4
5
Pin
Name
TxD
GND
V
CC
RxD
NC
V
IO
EN
6
7
8
CANL
CANH
S
Pin Type
digital input, internal pull−up
ground
supply
digital output
not connected
supply
digital input, internal pull−down
high voltage input/output
high voltage input/output
digital input, internal pull−down
Pin Function
Transmit data input; low input
Ù
dominant driver
Ground
Supply voltage
Receive data output; dominant bus
Ù
low output
Not connected, NCV7351−0 version only
Supply voltage for digital inputs/outputs, NCV7351−3 Version only
Enable control input, NCV7351−E version only
Low−level CAN bus line (low in dominant mode)
High−level CAN bus line (high in dominant mode)
Silent mode control input
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NCV7351, NCV7351F
APPLICATION INFORMATION
VBAT
5 V−reg
3 V−reg
V
IO
5
S
Micro
controller
.
GND
RxD
TxD
V
CC
3
7
8
NCV7351
4
1
2
GND
6
CANL
R
LT
= 60
W
RB20120808
CAN
BUS
R
LT
= 60
W
CANH
Figure 2. NCV7351−3 Application Diagram
VBAT
5 V−reg
V
CC
EN
S
.
Micro
controller
RxD
TxD
4
1
2
GND
GND
6
CANL
R
LT
= 60
W
RB20120808
5
8
NCV7351
CAN
BUS
3
7
R
LT
= 60
W
CANH
Figure 3. NCV7351−E Application diagram
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NCV7351, NCV7351F
FUNCTIONAL DESCRIPTION
NCV7351
has three versions which differ from each other
only by function of pin 5. (See also Table 2) Devices marked
with F (NCV7351F) are devices compliant to CAN flexible
data rate timing specifications as detailed in electrical
characteristics section. Except fulfilling these extra CAN
FD requirements, all remaining specifications are equal to
other devices from NCV7351 family. E.g. all specifications
valid for NCV7351−3 versions are also valid for
NCV7351F−3 version.
NCV7351−3:
Pin 5 is V
IO
pin, which is supply pin for
transceiver digital inputs/output (supplying pins TxD, RxD,
S, EN). The V
IO
pin should be connected to microcontroller
supply pin. By using V
IO
supply pin shared with
microcontroller the I/O levels between microcontroller and
Table 3. OPERATING MODES
Mode
Normal
Pin S
0
0
Silent
1
1
Off (Note 1)
X
Pin EN (Note 1)
1
1
1
1
0
Pin TxD
0
1
X
X
X
CANH,L Pins
Dominant
Recessive
Recessive
Dominant (Note 3)
floating
RxD
0
1
1
0
floating
transceiver are properly adjusted. This allows in
applications with microcontroller supply down to 3 V to
easy communicate with the transceiver. (See Figure 2)
NCV7351−0:
Pin 5 is not connected. This version is full
replacement of the previous generation CAN transceiver
AMIS30660.
NCV7351−E:
Pin 5 is digital enable pin which allows
transceiver to be switched off with very low supply current.
OPERATING MODES
The NCV7351 modes of operation are provided as
illustrated in Table 3. These modes are selectable through
pin S and also EN in case of NCV7351−E.
1. Only applicable to NCV7351−E
2. ‘X’ = don’t care
3. CAN bus driven to dominant by another transceiver on the bus
Normal Mode
In the normal mode, the transceiver is able to
communicate via the bus lines. The signals are transmitted
and received to the CAN controller via the pins TxD and
RxD. The slopes on the bus lines outputs are optimized to
give low EME.
Silent Mode
circuit is particularly needed in case of the bus line short
circuits.
TxD Dominant Time−out Function
In the silent mode, the transmitter is disabled. The bus pins
are in recessive state independent of TxD input. Transceiver
listens to the bus and provides data to controller, but
controller is prevented from sending any data to the bus.
Off Mode
In Off mode, complete transceiver is disabled and
consumes very low current. The CAN pins are floating not
loading the CAN bus.
Over−temperature Detection
A TxD dominant time−out timer circuit prevents the bus
lines being driven to a permanent dominant state (blocking
all network communication) if pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the low−level on pin TxD exceeds the
internal timer value t
dom
, the transmitter is disabled, driving
the bus into a recessive state. The timer is reset by a positive
edge on pin TxD. This TxD dominant time−out time
(t
dom(TxD)
) defines the minimum possible bit rate to
12 kbps.
Fail Safe Features
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 180°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC is reduced. All other
IC functions continue to operate. The transmitter off−state
resets when the temperature decreases below the shutdown
threshold and pin TxD goes high. The thermal protection
A current−limiting circuit protects the transmitter output
stage from damage caused by accidental short circuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
The pins CANH and CANL are protected from
automotive electrical transients (according to ISO 7637;
Figure 4). Internally, pin TxD is pulled high, pin EN and S
low should the input become disconnected. Pins TxD, S, EN
and RxD will be floating, preventing reverse supply should
the V
CC
supply be removed.
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