DATASHEET
PCI CLOCK GENERATOR
Description
The MK1493-03B is a general purpose clock generator
device that provides an integrated clocking solution for PCI
/networking applications. It provides eight individually
programmable PCI clocks, one CPU clock, three additional
fixed PCI clocks, and a 25 MHz reference clock for LAN
support. This part incorporates IDT’s newest clock
technology, offering more robust features and functionality.
The device provides a gradual transition from its initial clock
frequency to the new one. Using a serially programmable
SMBus interface, the MK1493-03B can select the output
clock frequency and the transition from the original value to
the new value. The SMBus also allows each of the 8
programmable PCI clocks to be individually enabled and
disabled.
MK1493-03B
Features
•
Individually programmable (25, 33.33, 50, 66.66 MHz)
•
•
•
•
•
•
•
•
•
•
•
•
•
PCI clocks (Serial or external pin control)
1 CPU clock at 100/125 MHz Selectable; single
ended/differential selectable
1 Clock at 66.66 MHz
1 Clock at 66/71/83 MHz selectable
1 Clock at 50 MHz
25 MHz reference clock
SMBus Programming
Power-up default frequency can be selected through FS
inputs
25 MHz crystal or clock input required
PCICLK cycle to cycle jitter <250 ps
CPUCLK cycle to cycle jitter <150 ps
48-pin, 240 mil TSSOP Package
Operating Voltage 3.3 V
±
5%
Commercial (0 to +70°C) and Industrial temperature
ranges (-40 to +85°C)
Block Diagram
VDD
7
8
SCLK
SDATA
FS(0:7)_A
FS(0:7)_B
FS8
FS9
FS10
X1/CLK
25 MHz
X2
External caps required
with crystal for accurate
tuning of the clock
7
GND
Clock Buffer/
Crystal
Ocsillator
REF25(25MHz)
8
8
PLL
Divider
Buffer Circuits
SMBus Programmable
PCICLK(0:7)
Each PCI Output Clock
Individually Programmable
CPUCLK 100M/125M
CPUCLKB 100M/125M
CLK66M/71M/83M
CLK66M
CLK50M
IDT™
PCI CLOCK GENERATOR
1
MK1493-03B
REV H 051310
MK1493-03B
PCI CLOCK GENERATOR
CLOCK SYNTHESIZER
Pin Assignment
FS3_A
FS2_A
FS1_A
FS0_A
GND
VDD
SCL
SDA
GND
X1 / ICLK
X2
VDD
REF25
VDD
GND
GND
VDD
CPUCLK
CPUCLK
FS7_B
CLK50M
FS6_B
FS5_B
FS4_B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48-pin TSSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
FS4_A
FS5_A
FS6_A
FS7_A
FS0_B
FS1_B
PCICLK7
GND
VDD
PCICLK6
PCICLK5
PCICLK4
FS2_B
VDD
GND
CLK66/71/83
CLK66M/FS8
FS3_B
VDD
GND
PCICLK2/FS10
PCICLK1/FS9
PCICLK0
PCICLK3
Table 1. Frequency Select
FS(0:7)_B
0
0
1
1
1)
FS(0:7)_A
0
1
0
1
PCICLK(0:7)*
1 2
25 MHz
33.3333 MHz
50 MHz
66.6666 MHz
Each PCI clock is individually selectable.
Table 2. Input Select
(FS8,
FS9,FS10&FS11)
FS8 (pin 32)
0
1
FS9
(pin 27)
0
0
1
1
2)
CPUCLK/CPUCLK
2
125MHz
100MHz
3
FS10
(pin 28)
0
1
0
1
CLK66M/71M/83M
2
(pin 33)
83.33 MHz
3
71.42 MHz
66.66 MHz
OFF
The changes in frequency are step changes.
3) Default Value upon Power up.
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
Pin
Name
FS3_A
FS2_A
FS1_A
FS0_A
GND
VDD
SCL
SDA
GND
X1/ICLK
X2
VDD
Pin
Type
Input
Input
Input
Input
Power
Power
Input
Input
Power
Input
XO
Power
Pin Description
Freq select input pin for PCI CLK3 per table 1
.
Internal pull-up resistor 120K.
Freq select input pin for PCI CLK2 per table 1
.
Internal pull-up resistor 120K.
Freq select input pin for PCI CLK1 per table 1
.
Internal pull-up resistor 120K.
Freq select input pin for PCI CLK0 per table 1
.
Internal pull-up resistor 120K.
Connect to ground.
Connect to +3.3 V.
Clock pin for SMBus circuitry, 5 V tolerant.
Data pin for SMBus circuitry, 5 V tolerant.
Connect to ground.
Crystal connection/input clock. Connect to a 25 MHz fundamental mode crystal or clock input.
Connect to a 25 MHz fundamental mode crystal or leave open for clock input.
Connect to +3.3 V.
IDT™
PCI CLOCK GENERATOR
2
MK1493-03B
REV H 051310
MK1493-03B
PCI CLOCK GENERATOR
CLOCK SYNTHESIZER
Pin
Number
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin
Name
REF25
VDD
GND
GND
VDD
CPUCLK
CPUCLK
FS7_B
CLK50M
FS6_B
FS5_B
FS4_B
PCICLK3
PCICLK0
PCICLK1/FS9
PCICLK2/FS10
GND
VDD
FS3_B
CLK66M/FS8
CLK66/71/83
GND
VDD
FS2_B
PCICLK4
PCICLK5
PCICLK6
VDD
GND
PCICLK7
FS1_B
FS0_B
FS7_A
FS6_A
FS5_A
FS4_A
Pin
Type
Pin Description
Output Buffered reference output of 25 MHz, (See table2, FS11=0 turns this clock off).
Power
Power
Power
Power
Connect to +3.3 V.
Connect to ground.
Connect to ground.
Connect to +3.3 V.
Output 100/125 MHz CPU clock.
Output 100/125 MHz CPU clock.
Input
1 of 4 freq select input pin for PCI CLK7 per table 1
.
Internal pull-up resistor 120 K
Ω.
Freq select input pin for PCI CLK6 per table 1
.
Internal pull-up resistor 120 K
Ω.
Freq select input pin for PCI CLK5 per table 1
.
Internal pull-up resistor 120 K
Ω.
Freq select input pin for PCI CLK4 per table 1
.
Internal pull-up resistor 120 K
Ω.
Output 50 MHz clock output.
Input
Input
Input
Output PCI CLK3 (Programmable PCI Clock 3).
Output PCI CLK0 (Programmable PCI Clock 0).
I/O
I/O
Power
Power
Input
I/O
PCI CLK1 (For CLK66/71/83 selection on pin 33, using FS9) (See table 2).
PCI CLK2 (For CLK66/71/83 selection on pin 33, using FS10) (See table 2).
Connect to ground.
Connect to +3.3 V.
Freq select input pin for PCI CLK3 per table 1
.
Internal pull-up resistor 120 K
Ω.
66.66 MHz clock, FS8=1 CPUCLK=100 MHz, FS8=0 CPUCLK=125 MHz) (table 2).
Output Clock66/71/83. Default Value is 83.33 MHz.
Power
Power
Input
Connect to ground.
Connect to +3.3 V.
Freq select input pin for PCI CLK2 per table 1
.
Internal pull-up resistor 120 K
Ω.
Output PCI CLK4 (Programmable PCI Clock 4).
Output PCI CLK5 (Programmable PCI Clock 5).
Output PCI CLK6 (Programmable PCI Clock 6).
Power
Power
Connect to +3.3 V.
Connect to ground.
Freq select input pin for PCI CLK1 per table 1
.
Internal Pull up resistor 120 K
Ω.
Freq select input pin for PCI CLK0 per table 1
.
Internal Pull up resistor 120 K
Ω.
Freq select input pin for PCI CLK7 per table 1
.
Internal Pull up resistor 120 K
Ω.
Freq select input pin for PCI CLK6 per table 1
.
Internal Pull up resistor 120 K
Ω.
Freq select input pin for PCI CLK5 per table 1
.
Internal Pull up resistor 120 K
Ω.
Freq select input pin for PCI CLK4 per table 1
.
Internal Pull up resistor 120 K
Ω.
Output PCI CLK7.
Input
Input
Input
Input
Input
Input
IDT™
PCI CLOCK GENERATOR
3
MK1493-03B
REV H 051310
MK1493-03B
PCI CLOCK GENERATOR
CLOCK SYNTHESIZER
Power Groups
Pin Number
VDD
12
30, 40
35
6
17
14
GND
9
29, 41
34
5
16
15
Ref, Crystal Osc Power
supply
PCICLK
PCI 66 clocks
SMBus
CPU Clocks(100MHz)
PLL
P
Description
O
O
O
Index Block Write Operation
Beginning Byte N
ACK
X Byte
O
O
O
Byte N + X - 1
ACK
stoP
General SM-Bus Serial Interface
Information
How to Write:
•
•
•
•
•
•
•
•
•
•
Controller (host) sends a start bit
Controller (host) sends the write address D2
(H)
IDT clock will
acknowledge
Controller (host) sends the beginning byte location =
N
IDT clock will
acknowledge
Controller sends Byte Count
X
IDT clock will
acknowledge
Controller (host) starts sending Byte
N through Byte
N+X-1
IDT clock will
acknowledge
each byte
one at a time
Controller (host) sends a Stop bit
Index Block Write Operation
Controller (Host)
T
Slave
Address D2
(H)
IDT (Slave/Receiver)
starT
WR
ACK
Beg Location = N
ACK
Data Byte Count = X
ACK
IDT™
PCI CLOCK GENERATOR
4
MK1493-03B
REV H 051310
MK1493-03B
PCI CLOCK GENERATOR
CLOCK SYNTHESIZER
How to Read:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Controller (host) will send a start bit
Controller (host) sends the write address D2
(H)
IDT clock will
acknowledge
Controller (host) sends the beginning Byte location = N
IDT clock will
acknowledge
Controller (host) will send a repeat start bit
Controller (host) sends the read address Byte D3
(H)
IDT clock will
acknowledge
IDT clock will send the data Byte count = X
IDT clock sends Byte
N
IDT clock sends Byte
N+X-1
Controller (host) will need to acknowledge each Byte
Controller (host) will send a not acknowledge bit
Controller (host) will send a stop bit
Index Block Read Operation
Controller (Host)
T
Slave Address
D2
(H)
starT bit
WR
=0
ACK
Beginning Loc = N
ACK
RT
Slave Address
D2
(H)
repeat
starT
RD
=1
ACK
Data Byte Count=X
ACK
Beginning Byte N
ACK
O
O
O
N
P
NAK
stoP bit
X
B
Y
T
E
S
O
O
O
Byte N + X - 1
IDT (Slave/Receiver)
SMBus Table 3: Read-Back Register
Byte 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
-
-
-
Frequency
Selection
See Frequency table 4
FS vs. SMBus
prog
Name
Control
Function
RESERVED
HW/SW select
RESERVED
RW
HW
SW
Type
0
1
Power
UP State
0
0
0
0
0
0
0
0
IDT™
PCI CLOCK GENERATOR
5
MK1493-03B
REV H 051310
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