Preliminary
Datasheet
HD74LV166A
Parallel-Load 8-bit Shift Register
Description
R04DS0002EJ0400
(Previous: REJ03D0321-0300)
Rev.4.00
Aug 16, 2010
The HD74LV166A is 8-bit shift register with an output from the last stage. Data may be loaded into the register either
in parallel or in serial form. When the Shift/Load input is low, the data is loaded asynchronously in parallel. When the
Shift/Load input is high, the data is loaded serially on the rising edge of either clock inhibit or Clock. Clear is
asynchronous and active-low.
The 2-input NOR clock may be used either by combining two independent clock sources or by designating one of the
clock inputs to act as a clock inhibit.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25°C)
Output current ±6 mA (@V
CC
= 3.0 V to 3.6 V), ±12 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Part Name
HD74LV166AFPEL
HD74LV166ATELL
Package Type
SOP–16 pin(JEITA)
TSSOP–16 pin
Package Code
(Previous Code)
PRSP0016DH-B
(FP–16DAV)
PTSP0016JB-A
(TTP–16DAV)
FP
T
Package
Abbreviation
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
CLR
L
H
H
H
H
H
Note:
SH/LD
X
X
L
H
H
X
Inputs
CLK INH
CLK
X
X
L
L
L
L
L
H
SER
X
X
X
H
L
X
A ... H
X
X
a ... h
X
X
X
Internal outputs
QA
QB
L
L
Q
A0
Q
B0
a
H
L
Q
A0
b
Q
An
Q
An
Q
B0
Output
QH
L
Q
H0
h
Q
Gn
Q
Gn
Q
H0
H: High level
L: Low level
:
Low to high transition
X: Immaterial
a ... h: Parallel data
Outputs remain unchanged.
Q
A0
... Q
H0
:
Data shifted from the previous stage on a positive edge at the clock input.
Q
An
... Q
Gn
:
R04DS0002EJ0400 Rev.4.00
Aug 16, 2010
Page 1 of 9
HD74LV166A
Preliminary
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range*
1
Output voltage range*
1, 2
Input clamp current
Output clamp current
Continuous output current
Continuous current through
V
CC
or GND
Maximum power dissipation at
3
Ta = 25°C (in still air)*
Storage temperature
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
T
Tstg
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to V
CC
+ 0.5
–0.5 to 7.0
–20
±50
±25
±50
785
500
–65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Conditions
Output: H or L
V
CC
: OFF
V
I
< 0
V
O
< 0 or V
O
> V
CC
V
O
= 0 to V
CC
SOP
TSSOP
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item
Supply voltage range
Input voltage range
Output voltage range
Output current
Symbol
V
CC
V
I
V
O
I
OH
Min
2.0
0
0
—
—
—
—
—
—
—
—
0
0
0
–40
Max
5.5
5.5
V
CC
–50
–2
–6
–12
50
2
6
12
200
100
20
85
Unit
V
V
V
A
mA
Conditions
I
OL
A
mA
Input transition rise or fall rate
t
/v
ns/V
H or L
V
CC
= 2.0 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
V
CC
= 2.0 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
Operating free-air temperature
Note:
Ta
°C
Unused or floating inputs must be held high or low.
R04DS0002EJ0400 Rev.4.00
Aug 16, 2010
Page 3 of 9
HD74LV166A
Preliminary
DC Electrical Characteristics
(Ta = –40 to 85°C)
Item
Input voltage
Symbol
V
IH
V
CC
(V)*
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to Max
2.3
3.0
4.5
Min to Max
2.3
3.0
4.5
0 to 5.5
5.5
0
3.3
Min
1.5
V
CC
0.7
V
CC
0.7
V
CC
0.7
—
—
—
—
V
CC
–0.1
2.0
2.48
3.8
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.7
Max
—
—
—
—
0.5
V
CC
0.3
V
CC
0.3
V
CC
0.3
—
—
—
—
0.1
0.4
0.44
0.55
±1
20
5
—
Unit
V
Test Conditions
V
IL
Output voltage
V
OH
V
V
OL
Input current
Quiescent supply
current
Output leakage
current
Input capacitance
Note:
I
IN
I
CC
I
OFF
C
IN
A
A
µA
pF
I
OL
= –50
A
I
OL
= –2 mA
I
OL
= –6 mA
I
OL
= –12 mA
I
OL
= 50
A
I
OL
= 2 mA
I
OL
= 6 mA
I
OL
= 12 mA
V
I
= 5.5 V or GND
V
I
= V
CC
or GND, I
O
= 0
V
I
or V
O
= 0 V to 5.5 V
V
I
= V
CC
or GND
For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
R04DS0002EJ0400 Rev.4.00
Aug 16, 2010
Page 5 of 9
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
