MOTOROLA
SEMICONDUCTOR
TECHNICAL DATA
Order thie document
by3VFPMU64D~
4Mx64
DRAM Dual-In-Line
Memory Module (DIMM)
32
Megabyte
q
q
q
q
q
q
q
I
I
3.3 V, FPM, Unbuffered
I
I
JEDEC–Standard
168–Lead Dual–In-Line
Memory Module (DIMM)
Inputs and Outputs
Single 3.3 V Power Supply, LWL<ompatible
Fast Page Mode (FPM)
RAS–Only Refresh, ~
Before RAS Refresh, Hidden Refresh
32MB: 2048 Cycle Refresh: 32 ms (Max)
Keys Prevent Accidental Insertion into 5 V Systems
Serial Presence Detect (SPD) Provides Module Configuration
Information
PART NUMBERS (See
Paae
20
for
Definitions)
Organization
4M
X
64
60
MA644CT10TADG60
70
.,
“
MA644CT1OT#~~O
*
‘“‘
,$i,;‘\:!,
KEY TIMING PARAMETERS
Speed
60
70
tRC
(nS)
tR&c
(nS)
tcA~
(ns)
15
.$
tAA ~~~’
‘“30
tpc(ns)
40
45
110
130
60
70
204*’.i\ *:1, 35
\
,,
I
32MB
60
,X$’w?:~%,800
88
IT
Izl
7/96
@ Motorola, Inc. 1996
MOTOROLA
@
4Mx6403.3VOFPMOU
PIN ASSIGNMENTS
Front Side
Pin
1
2
3
4
5
6
7
a
9
10
11
12
13
14
15
16
17
18
19
20
21
Name
Vss
DQO
DQ1
DQ2
DQ3
Vcc
DQ4
DQ5
DQ6
DQ7
DQa
Vss
DQ9
DQ1O
DQ1l
DQ12
DQ13
Vcc
DQ14
DQ15
NC
Pin
22
23
24
25
26
27
2a
29
30
31
32
33
34
35
36
37
3a
39
40
41
42
Name
NC
Vss
NC
NC
Vcc
WEO
CASO
CAS1
RASO
m
Vss
AO
M
A4
A6
Aa
Al O
NC
Vcc
Vcc
NC
Pin
43
44
45
46
47
4a
49
50
51
52
53
54
55
56
57
5a
59
60
61
62
63
Name
Vss
@
RAS2
CAS2
CAS3
WE2
Vcc
NC
NC
NC
NC
Vss
DQ16
DQ17
DQ18
DQ19
Vcc
DQ20
NC
NC
NC
Pin
64
65
66
67
6a
69
70
71
72
73
74
75
76
77
7a
79
ao
al
82
83
Name
Vss
DQ21
DQ22
DQ23
Vss
DQ24
DQ25
DQ26
DQ27
Vcc
DQ2a
DQ29
DQ30
DQ31
Vss
NC
NC
NC
Pin
a5
a6
a7
aa
a9
90
91
92
93
94
95
96
97
9a
99
100
Name
Vss
DQ32
DQ33
DQ34
DQ35
Vcc
DQ36
DQ37
DQ3a
DQ39
DC40
Vss
DQ41
DQ42
DQ:3$
Back Side
Pin
106
107
I oa
109
110
111
112
113
114
115
116
117
118
-
Name
NC
Vss
NC
NC
Vcc
NC
CAS4
CAS5
NC
NC
Pin
i 27
12a
129
130
131
132
133
134
135.,4; ‘~~~& “
*X
“~FNc
NC
Vss
DQ4a
DQ49
DQ50
DQ51
Vcc
DQ52
NC
NC
NC
156
157
15a
159
160
161
162
163
164
165
166
167
16a
DQ59
Vcc
DQ60
DQ61
DQ62
DQ63
Vss
NC
NC
SAO
SA1
SA2
Vcc
Name
Vss
NC
NC
CAS6
CAS7
NC
Pin
14a
149
150
151
Name
Vss
DQ53
DQ54
DQ55
~!~.~,
vs~,”~ ;(;~f~
.
+$g:
~. 13a
“y~%f’
A5
A7
Ag
NC
NC
Vcc
NC
NC
139
i 40
141
142
143
144
145
146
147
.$fq$. ,,
..+.4,,:
,<~,
,,,.
: *$g&
*
‘%’?21
122
123
124
125
126
101.$ ib;DQ4g
#2
~ ~~~
“:+ WCC
:
DQ46
DQ47
NC
SD&y$: $$y’
,,,
SCL ‘ ‘L’*104
.,,,.
105
84,,$$: Vcc
~;,
*>+,>. ~t..~
~:
,Y
,..
.,
“tl~’j
.,<$>+ ~ :.
,,$7!
’,’
.<.> ..l,$i
.
::];~:::,,,
,
PIN NAMES
DQO-DQ63
RASO, RAS2
~,=
.....
SCL . . . . . . .
VCC . . . . . . .
NC . . . . . . . .
..
..
..
..
..
..
. . . . Data lnpuffOutput
. Row Address Strobe
. . . . . .. Output Enable
. . . . . . . . .. SPDClock
. . . . . . . . . . . . .. Power
. . . . . . No Connection
AO-A1O _
‘;v$~$’)
. .,:.. ,. , h’. .
.\:<.::\
..~:h.,,
CASO - CASRW4 .’&oTumn
WEO, WE&’7. ~$y. . . . .
SAO ;:@;&<,$:$.,.,
... ..
~~.. . . . . . . . . . . .
SDA$,. . :*
~=&X$S~@: . . . . . . . . . . . . .
.
Address Inputs
Address Strobe
. . . Write Enable
. . SPD Address
. . SPD Data 1/0
. . . . . . Ground
3VFPMU64D
MOTOROLA DRAM
2
4Mx64.3.3V.
32MB BLOCK DIAGRAM
FPM.
U
m
m
RASO
CASO
DQO
DQ1
DQ2
I
I
I
——
CAS
RAS
—
WE
~
DQO - DQ3 -
CAS1
DQO
DQ1
DQ2
——
CAS
RAS
—
WE
~
A
DQ3
I
-
DQ48-DQ5-
Q-Q=
CAS3
256- DQ59
3
DQ1
DQ2
DQ3
I
I
CAS
MS
~
~
DQ60 - DQ63 -
DQO
DQ1
D@
DQ3
AO-A1O
~
DRAMs
DRAMs, SPD
C1416
SERIAL PD
Vcc
Vss
P
DRAMs, SPD
‘cLmsDA
SAO
SA1
Sk
MOTOROU
DRAM
3VFPMU64D
9
4Mx6403.3V*FPM*U
ABSOLUTE
MNIMUM
Rating
RATINGS
(See Note)
Symbol
Vcc
Yn~ Vout
Vin, Vout
lout
pD
Range
TA
Tstg
Value
–
0.3 to + 4.6
–
0.3
to
Vcc + 0.3
Unit
v
v
This device contains circuity to protect the
inputs against damage due to high static
voltages or electric fields; however, it is ad-
vised that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to these high-impedance
circuits.
Power Supply Voltage
Voltage Relative to VSS
(For Any Pin Except VCC)
SPD Pins
Data Output Current per DQ Pin
Power Dissipation
Operating Temperature
– 0.3 to 6.5
50
14.4
‘oto+70
–55to+150
v
mA
w
‘c
‘c
Storage Temperature Range
NOTE: Permanent device damage may occur if ABSOLUTE M~lMUM
RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS.
Exposure to higher than recommended
voltages for
extended periods of time could affect
device reliability.
DC OPERATING
(VCC
CONDITIONS
\?*,.
‘$;
AND CHARACTERISTk.@;$;3’
~~~~~ ,$?
.~. Y+ +Z
\ L::.
‘A, ,*..
.,
!:,. ~~?~l::
,*!.
‘*{,3,
es:<.\.*:<2~,
“*rit. ~
,,,$t).,.,:..>
e;, ,.<3$A’+
*, k&*\,F
..;~tt.‘:.\’~:t:,$
‘
.,$>..>.,., ,,.
, ,,J.,\,,; ~
,:.,.(.,,”..
~$s
‘
,.:~
.;>~,,,$:w
‘i’~’”
,
~.$.t..$’:’
>
,,**. $.+.!
,.:,
~!:. . ~
=
3,3 V f 0.3 V, TA = O
to
70°C,
Unless Otherwise
Parameter
Supply Voltage (Operating Voltage Range)
Symbol
Vcc
Vsg,
\*,,,y
.>,
.<,?$~
..*\
., ‘
<,+
i\*..\,i$.o
‘:?~ .,,
0
2.2
- 0,3**
–
0.3
Vcc
x
0.7
—
-160
–10
2.4
—
Typ
3.3
0
—
—
—
—
—
—
—
—
—
Vcc
Max
3.6
0
+ 0.3*
0.8
Vcc + 0.3
Vcc
+ 0.5
0.4
160
10
—
0.4
Unit
v
Logic High Voltage, All Inputs
Logic Low Voltage, All Inputs
SPD Pins
SPD Pins
SPD (IVOL = 2.1 mA)
Input Leakage Current (Vss < ~n S VCC)
.t~[H3>
,;~,, ,.,v:@
$
*:tf~g% V[L
.j..
.
&v 4’
....,.
.;‘. ~y,i
,,,
$):,. , &
,<: ,,,.1.
.s; ‘:>,,
~ I.$, “IX.
V[H
VOL
Ilkg(l)
llkg(0)
VOH
VOL
v
v
v
v
v
PA
pA
v
v
Output Leakage Current (CAS at Logic 1, VSS
S,~~~~’~$~CC)
. \
>*~~t:’t\.j,
.{...,,.,
,:”,,,,,
..:$:;
.*
Output High Voltage (IOH = -2 mA)
.>i
,~~)\
::..{<,,..,.,
Output Low Voltage (iOL = 2 mA)
,F+x’t%k,$,
3$’
*VCC + 1.2 V at pulse widths < <O~,$+,fl#
q
*– 1.2 Vat pulse widths <20 nq$’’”’’~h}
3VFPMU64D
4
MOTOROLA
DRAM
4Mx6403.3VOFPMOU
)C CHARACTERISTICS
AND SUPPLY CURRENTS
(All
Voltages Referenced
to Vss)
32MB
Characteristic
VCC
Power Supply Current
—_
VCC Power Supply Current (Standby) (RAS = CAS = VIH)
VCC Power Supply Current
During RAS Only Refresh Cycles
VCC Power Supply Current
During FPM Cycle
(tRC = tRC Min)
60
70
(tpc = tpc Min)
60
70
ICC5
60
70
1CC6
ICC4
(tRC = tRC Min)
60
70
ICC2
ICC3
Symbol
Iccl
Min
—
—
—
—
—
—
—
—
—
—
Max
1600
1440
16
1600
1440
Unit
mA
Notes
1,2
mA
mk$:,
1,2
,\)**,:,.:.,.:.
, .,bc$
.
,,,- .“*>,,.:.
+
1,2
1120,
$ $~”
g:,$+>*($+{
y
~f$~’;”::$
mA
—_
VCC Power Supply Current (Standby) (RAS = CAS = VCC – 0.2 V)
VCC Power Supply Current
During CAS Before RAS Refresh Cycle
(tRC = tRC Min)
1
mA
*+ k>?,:q~&
.-l? :~1 440
\
,*
, ‘.::t/m
IOTES:
.&$,.+,..+
;\.
1. Current is a function of cycle rate and output loading; maximum current is measured at the fa~~~we
rate with the output open.
2. Column address can be changed once or less while RAS = VIL and CAS = VIH.
.*-F ‘i ‘t$%::
>,\>
“~.N:.\*l
..:. .s~, ,,,,.,
>
t,:,. ~~.>...)~~
.~
,
CAPACITANCE
(f= 1.0 MHz, TA = 25°C, VCC = 3.3 V, Periodically Sampled Rather Than$~@?Tested)
. ..
,,~,.:
>.,:
input Capacitance
Symbol
‘.~\::.~,
, ~!:!!
.,.:)
Max
Unit
.,,:.
$’....,,,..,,,
Addresses
.*( ~:: ‘
qn
90
pF
,,, ~...,: Q
.!C,?:.
...
‘“ ....
m, G
*:;’;-..&
qn
66
~<i ,
,
pF
*S
~;.h>
,,,:;
RAS
,.x,<{~:
~ ~,
qn
66
pF
,{;y.?:,-,~
., ,.1,.,,
CAS
~!.*~ .$,<
qn
24
pF
!.}
,.>
~~>., .....
>. !,:,.:,*
.
I SPD
“s?
Cin
18
<:k~<k,i:%t,r:t
pF
.*
DQ
?.+:.,
Cout
17
pF
NOTE: Ca~acitance measured with a Boonton Mf
..~ter oE.#~fiectfve capacitance calculated from the equation: C = AVAV.
.,**..:.~i)>
i..,
$.,
MOTOROM
DRAM
3VFPMU64D
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
