FM34W02U 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM
with Full Array Write Protect
Connection Diagram
SO (M8) and TSSOP (MT8) Package
A0
A1
A2
VSS
1
2
3
4
8
VCC
WP
SCL
SDA
FM34W02U
7
6
5
Top View
See Package Number
M08A and MTC08
Pin Names
A0,A1,A2
V
SS
SDA
SCL
WP
V
CC
Device Address Inputs
Ground
Data I/O
Clock Input
Write Protect
Power Supply
Ordering Information
FM
34
W
02
U
LZ
E
XX
Package
Temp. Range
Voltage Operating Range
M8
MT8
None
E
Blank
L
LZ
U
02
W
Interface
34
FM
Letter Description
8-Pin SO8
8-Pin TSSOP
0 to 70°C
-40 to +85°C
4.5V to 5.5V
2.7V to 5.5V
2.7V to 5.5V and
<1µA Standby Current
Ultralite CS100UL
2K
Full Array Write Protect
IIC
Fairchild Non-Volatile
Memory
Process
Density
2
FM34W02U Rev. A.1
www.fairchildsemi.com
FM34W02U 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM
with Full Array Write Protect
Product Specifications
Absolute Maximum Ratings
Ambient Storage Temperature
All Input or Output Voltages
with Respect to Ground
Lead Temperature
(Soldering, 10 seconds)
ESD Rating
–65°C to +150°C
6.5V to –0.3V
+300°C
2000V min.
Operating Conditions
Ambient Operating Temperature
FM34W02U
FM34W02UE
Positive Power Supply
FM34W02U
FM34W02UL
FM34W02ULZ
0°C to +70°C
-40°C to +85°C
4.5V to 5.5V
2.7V to 5.5V
2.7V to 5.5V
Standard V
CC
(4.5V to 5.5V) DC Electrical Characteristics
Symbol
Parameter
Test Conditions
Min
I
CCA
I
SB
I
LI
I
LO
V
IL
V
IH
V
OL
Active Power Supply Current
Standby Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
I
OL
= 3 mA
f
SCL
= 400 kHz
V
IN
= GND or V
CC
V
IN
= GND to V
CC
V
OUT
= GND to V
CC
–0.3
V
CC
x 0.7
Limits
Typ
(Note 1)
0.2
10
0.1
0.1
Units
Max
1.0
50
1
1
V
CC
x 0.3
V
CC
+ 0.5
0.4
mA
µA
µA
µA
V
V
V
Low V
CC
(2.7V to 5.5V) DC Electrical Characteristics
Symbol
Parameter
Test Conditions
Min
I
CCA
I
SB
Active Power Supply Current
Standby Current
f
SCL
= 400 kHz
V
IN
= GND or V
CC
= 4.5V - 5.5V
V
IN
= GND or V
CC
= 2.7V - 5.5V (L)
V
IN
= GND or V
CC
= 2.7V - 5.5V (LV)
V
IN
= GND to V
CC
V
OUT
= GND to V
CC
–0.3
V
CC
x 0.7
I
OL
= 3 mA
Limits
Typ
(Note 1)
0.2
10
1
0.1
0.1
0.1
Units
Max
1.0
50
10
1
1
1
V
CC
x 0.3
V
CC
+ 0.5
0.4
mA
µA
µA
µA
µA
µA
V
V
V
I
LI
I
LO
V
IL
V
IH
V
OL
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Capacitance
T
A
= +25°C, f = 100/400 KHz, V
CC
= 5V
(Note 2)
Symbol
C
I/O
C
IN
Test
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, SCL)
Conditions
V
I/O
= 0V
V
IN
= 0V
Max
8
6
Units
pF
pF
Note 1:
Typical values are T
A
= 25°C and nominal supply voltage (5V).
Note 2:
This parameter is periodically sampled and not 100% tested.
3
FM34W02U Rev. A.1
www.fairchildsemi.com
FM34W02U 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM
with Full Array Write Protect
AC Conditions of Test
Input Pulse Levels
Input Rise and Fall Times
Input & Output Timing Levels
Output Load
V
CC
x 0.1 to V
CC
x 0.9
10 ns
V
CC
x 0.5
1 TTL Gate and C
L
= 100 pF
Read and Write Cycle Limits (Standard and Low V
CC
Range 2.7V - 5.5V)
Symbol
f
SCL
T
I
Parameter
SCL Clock Frequency
Noise Suppression Time Constant at
SCL, SDA Inputs (Minimum V
IN
Pulse width)
SCL Low to SDA Data Out Valid
Time the Bus Must Be Free before
a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
(for a Repeated Start Condition)
Data in Hold Time
Data in Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
Write Cycle Time - FM34W02U
- FM34W02UL, FM34W02ULZ
100 KHz
Min
Max
100
100
0.3
4.7
4.0
4.7
4.0
4.7
0
250
1
300
4.7
300
10
15
3.5
400 KHz
Min
Max
400
50
0.1
1.3
0.6
1.5
0.6
0.6
0
100
0.3
300
0.6
50
10
15
0.9
Units
KHz
ns
µs
µs
µs
µs
µs
µs
ns
ns
µs
ns
µs
ns
ms
t
AA
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
DH
t
WR
(Note 3)
Note 3:
The write cycle time (t
WR
) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle, the
FM34W02U bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resistor, and the device does not respond to its slave address.
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