8-BIT SINGLE CHIP MICROCONTROLLER
Preliminary
LC863448A/40A
Overview
The LC863448/40A are 8-bit single chip microcontrollers with the following on-chip functional blocks:
- CPU : Operable at a minimum bus cycle time of 0.424µs
- On-chip ROM capacity
Program ROM : 48K/40K bytes
CGROM : 16K bytes
- On-chip RAM capacity : 640 bytes
- OSD RAM : 352 × 9 bits
- Closed-Caption TV controller and the on-screen display controller
- Closed-Caption data slicer
- Four channels × 6-bit AD Converter
- Three channels × 7-bit PWM
- 16-bit timer/counter, 14-bit base timer
- IIC-bus compliant serial interface circuit (Multi-master type)
- ROM correction function
- 11-source 8-vectored interrupt system
- Integrated system clock generator and display clock generator
Only one X'tal oscillator (32.768kHz) for PLL reference is used for both generators
TV control and the Closed Caption function
All of the above functions are fabricated on a single chip.
♦
No products described or contained herein are intended for use in surgical implants, life-support systems,
aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the
like, the failure of which may directly or indirectly cause injury, death or property loss.
♦
Anyone purchasing any products described or contained herein for an above-mentioned use shall :
1) Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates,
subsidiaries and distributors and all their officers and employees, jointly and severally, against any
and all claims and litigation and all damages, cost and expenses associated with such use :
2) Not impose any responsibility for any fault or negligence which may be cited in any such claim or
litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of
their officers and employees jointly or severally.
♦
Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no
guarantees are made or implied regarding its use or any infringements of intellectual property rights or other
rights of third parties.
Note : This product includes the IIC bus interface circuit. If you intend to use the IIC bus interface, please
notify us of this in advance of our receiving your program ROM code order.
Purchase of SANYO IIC components conveys a license under the Philips IIC Patents Rights to use these
components in an IIC system, provided that the system conforms to the IIC Standard Specification as
defined by Philips.
Trademarks
IIC is a trademark of Philips Corporation.
This catalog provides information as of April 2001. Specifications and information herein are subject to change
without notice.
SANYO Electric Co., Ltd. Semiconductor Company System BusinessI Div.
Microcomputer Development Dep.
1-1-1, Sakata Oizumi-Machi, Gunma, JAPAN
Ver. 0.90
2001- 4- 6
SYSTEM-BZ
H.Shindo
1/20
LC863448A/40A
Features
(1) Read-Only Memory (ROM) :
49152 × 8 bits (LC863448A) / 40960 × 8 bits (LC863440A) for
program
16128 × 8 bits for CGROM
512 × 8 bits (working area)
128 × 8 bits (working or ROM correction function)
352 × 9 bits (for CRT display)
(2) Random Access Memory (RAM) :
(3) OSD functions
- Screen display
: 36 characters × 16 lines (by software)
- RAM
: 352 words (9 bits per word)
Display area
: 36 words × 8 lines
Control area
: 8 words × 8 lines
- Characters
Up to 252 kinds of 16 × 32 dot character fonts
(4 characters including 1 test character are not programmable)
Each font can be divided into two parts and used as two fonts (Ex. 16 × 16 dot character font × 2)
At least 111 characters need to be divide between a 16×18 dot and 8 × 9 dot character font to display
the caption fonts.
- Various character attributes
Character colors
: 16 colors (analog mode: lv
p-p
output) / 8 colors (digital/mode)
Character background colors
: 16 colors (analog mode: lv
p-p
output) / 8 colors (digital/mode)
Fringe / shadow colors
: 16 colors (analog mode: lv
p-p
output) / 8 colors (digital/mode)
Full screen colors
: 16 colors (analog mode: lv
p-p
output) / 8 colors (digital/mode)
Rounding
Underline
Italic character (slanting)
- Attribute can be changed without spacing
- Vertical display start line number can be set for each row independently (Rows can be overlapped)
- Horizontal display start position can be set for each row independently
- Horizontal pitch (bit 9 - 16)
*1
and vertical pitch (bit-32) can be set for each row independently
- Different display modes can be set for each row independently
Caption • Text mode / OSD mode 1 / OSD mode 2 (Quarter size) / Simplifed graphic mode
- Ten character sizes
*1
Horez. × Vert. = (1 × 1), (1 × 2), (2 × 2), (2 × 4), (0.5 × 0.5)
(1.5 × 1), (1.5 × 2), (3 × 2), (3 × 4), (0.75 × 0.5)
- Shuttering and scrolling on each row
- Simplified Graphic Display
*1 Note : range depends on display mode : refer to the manual for details.
(4) Data Slicer (closed caption format)
- Closed caption data and XDS data extraction
- NTSC/PAL, and extracted line can be specified
(5) Bus Cycle Time / Instruction-Cycle Time
Bus cycle time Instruction cycle time Clock divider
0.424µs
0.848µs
1/2
7.5µs
91.55µs
183.1µs
15.0µs
183.1µs
366.2µs
1/2
1/1
1/2
System clock oscillation
Internal VCO
(Ref : X'tal 32.768kHz)
Internal RC
Crystal
Crystal
Oscillation Frequency
14.156MHz
800kHz
32.768kHz
32.768kHz
Voltage
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
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LC863448A/40A
(6) Ports
- Input / Output Ports
: 4 ports (23 terminals)
Data direction programmable in nibble units
: 1 port (8 terminals)
(If the N-ch open drain output is selected by option, the corresponding port data can be read in output
mode.)
Data direction programmable for each bit individually
: 3 ports (15 terminals)
(7) AD converter
- 4 channels × 6-bit AD converters
(8) Serial interfaces
- IIC-bus compliant serial interface (Multi-master type)
Consists of a single built-in circuit with two I/O channels.
connected internally.
(9) PWM output
- 3 channels × 7-bit PWM
(10) Timer
- Timer 0 : 16-bit timer/counter
With 2-bit prescaler + 8-bit programmable prescaler
Mode 0 : Two 8-bit timers with a programmable prescaler
Mode 1 : 8-bit timer with a programmable prescaler + 8-bit counter
Mode 2 : 16-bit timer with a programmable prescaler
Mode 3 : 16-bit counter
The resolution of timer is 1 tCYC.
- Base timer
Generate every 500ms overflow for a clock application (using 32.768kHz crystal oscillation for the
base timer clock)
Generate every 976µs, 3.9ms, 15.6ms, 62.5ms overflow (using 32.768kHz crystal oscillation for the
base timer clock)
Clock for the base timer is selectable from 32.768kHz crystal oscillation, system clock or
programmable prescaler output of Timer 0
(11) Remote control receiver circuit (connected to the P73/INT3/T0IN terminal)
- Noise rejection function
- Polarity switching
(12) Watchdog timer
External RC circuit is required
Interrupt or system reset is activated when the timer overflows
(13) ROM correction function
Max 128 bytes / 2 addresses
(14) Interrupts
- 11 sources 8 vectored interrupts
1. External Interrupt INT0
2. External Interrupt INT1
3. External Interrupt INT2, Timer/counter T0L (Lower 8 bits)
4. External Interrupt INT3, base timer
5. Timer/counter T0H (Upper 8 bits)
6. Data slicer
7. Vertical synchronous signal interrupt ( VS ), horizontal line (
HS
)
8. IIC
The two data lines and two clock lines can be
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Ver. 0.90
LC863448A/40A
- Interrupt priority control
Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible.
Low or high priority can be assigned to the interrupts from 3 to 8 listed above. For the external
interrupt INT0 and INT1, low or highest priority can be set.
(15) Sub-routine stack level
- A maximum of 128 levels (stack is built in the internal RAM)
(16) Multiplication/division instruction
- 16 bits × 8 bits (7 instruction cycle times)
- 16 bits / 8 bits (7 instruction cycle times)
(17) 3 oscillation circuits
- Built-in RC oscillation circuit used for the system clock
- Built-in VCO circuit used for the system clock and OSD
- X'tal oscillation circuit used for base timer, system clock and PLL reference
(18) Standby function
- HALT mode
The HALT mode is used to reduce the power dissipation. In this operation mode, the program
execution is stopped. This mode can be released by the interrupt request or the system reset.
- HOLD mode
The HOLD mode is used to stop the oscillations; RC (internal), VCO, and X’tal oscillations. This
mode can be released by the following conditions.
• Pull the reset terminal ( RES ) to low level.
• Feed the selected level to either P70/INT0 or P71/INT1.
(19) Package
- MFP36S
- DIP36S
(20) Development tools
- Flash EEPROM:
- Evaluation chip:
- Emulator:
LC86F3448A
LC863096
EVA86000 (main) + ECB863400 (evaluation chip board)
+ POD36-CABLE (cable)
+ POD36-DIP (for DIP36S)
or POD36-MFP (for MFP36S)
4/20
Ver. 0.90
LC863448A/40A
System Block Diagram
Interrupt Control
IR
PLA
Standby Control
ROM
RC
VCO
Clock
Generator
X’tal
PC
PLL
IIC
ROM Correct Control
ACC
XRAM
B Register
Timer 0
Bus Interface
C Register
Port 1
ALU
Base Timer
Port 3
ADC
Port 7
PSW
INT0-3
Noise Rejection Filter
RAR
PWM
CGROM
Data Slicer
OSD
Control
Circuit
RAM
Stack Pointer
VRAM
Port 0
Watch Dog Timer
5/20
Ver. 0.90
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