IRF9530NS/L
l
l
l
l
l
l
l
Advanced Process Technology
Surface Mount (IRF9530NS)
Low-profile through-hole (IRF9530NL)
175°C Operating Temperature
Fast Switching
P-Channel
Fully Avalanche Rated
D2 P a k
T O -2 6 2
Description
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF9530NL) is available for low-
profile applications.
D
V
DSS
= -100V
R
DS(on)
= 0.20Ω
G
I
D
= -14A
S
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ -10V
Continuous Drain Current, V
GS
@ -10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
-14
-10
-56
3.8
79
0.53
± 20
250
-8.4
7.9
-5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
–––
–––
Max.
1.9
40
Units
°C/W
2014-8-26
1
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IRF9530NS/L
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
Gate Threshold Voltage
g
fs
Forward Transconductance
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
-100
–––
–––
-2.0
3.2
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
15
58
45
46
7.5
760
260
170
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= -250µA
––– V/°C Reference to 25°C, I
D
= -1mA
0.20
Ω
V
GS
= -10V, I
D
= -8.4A
-4.0
V
V
DS
= V
GS
, I
D
= -250µA
–––
S
V
DS
= -50V, I
D
= -8.4A
-25
V
DS
= -100V, V
GS
= 0V
µA
-250
V
DS
= -80V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
58
I
D
= -8.4A
8.3
nC
V
DS
= -80V
32
V
GS
= -10V, See Fig. 6 and 13
–––
V
DD
= -50V
–––
I
D
= -8.4A
ns
–––
R
G
= 9.1Ω
–––
R
D
= 6.2Ω, See Fig. 10
Between lead,
nH
–––
and center of die contact
–––
V
GS
= 0V
–––
pF
V
DS
= -25V
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -14
showing the
A
G
integral reverse
––– ––– -56
p-n junction diode.
S
––– ––– -1.6
V
T
J
= 25°C, I
S
= -8.4A, V
GS
= 0V
––– 130 190
ns
T
J
= 25°C, I
F
= -8.4A
––– 650 970
nC
di/dt = -100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width
≤
300µs; duty cycle
≤
2%.
Uses IRF9530N data and test conditions
Starting T
J
= 25°C, L =7.0mH
R
G
= 25Ω, I
AS
= -8.4A. (See Figure 12)
I
SD
≤
-8.4A, di/dt
≤
-490A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C
2014-8-26
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IRF9530NS/L
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
100
-ID , D rain-to-S ource C urrent (A )
10
-ID , Drain-to-Source Current (A )
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
10
-4.5V
1
1
-4 .5V
0.1
0.1
1
20 µ s P U L S E W ID TH
T
J
= 25°C
c = 25 °C
A
10
100
0.1
0.1
1
2 0µ s P U LS E W ID TH
T
J
= 1 75 °C
T
C
= 175°C
10
100
A
-VD S , D rain-to-S ource V oltage (V )
-VD S , D rain-to-S ource V oltage (V )
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.5
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= -14A
-I
D
, D rain-to -So urc e C urre nt (A )
2.0
T
J
= 2 5 °C
10
T
J
= 1 7 5 °C
1.5
1.0
1
0.5
0.1
4
5
6
7
V
DS
= -5 0 V
2 0µ s P U L S E W ID TH
8
9
10
A
0.0
-60 -40 -20
V
GS
= -10V
0
20 40 60 80 100 120 140 160 180
-V
G S
, Ga te -to-Source Volta ge (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
2014-8-26
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IRF9530NS/L
2000
1600
-V
GS
, Gate-to-Source Voltage (V)
V
GS
C
iss
C
rs s
C
o ss
=
=
=
=
0V ,
f = 1MHz
C
g s
+ C
g d
, C
d s
S H O R TE D
C
gd
C
ds
+ C
g d
20
I
D
= -8.4A
V
DS
= -80V
V
DS
= -50V
V
DS
= -20V
C , Capacitance (pF)
15
1200
C
iss
10
800
C
oss
C
rss
5
400
0
1
10
100
A
0
0
10
20
30
FOR TEST CIRCUIT
SEE FIGURE 13
40
50
60
-V
D S
, D rain-to-S ourc e V oltage (V )
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
-I
SD
, Reverse D rain Current (A )
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T
J
= 15 0°C
10
-I
D
, Drain Current (A)
I
100
10us
T
J
= 2 5°C
100us
10
1ms
1
0.1
0.4
0.6
0.8
1.0
1.2
V
G S
= 0 V
1.4
A
1
1
T
C
= 25 °C
T
J
= 175 ° C
Single Pulse
10
10ms
100
1000
1.6
-V
S D
, S ourc e-to-D rain V oltage (V )
-V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
2014-8-26
4
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IRF9530NS/L
14
V
DS
12
R
D
V
GS
R
G
D.U.T.
+
-I
D
, Drain Current (A)
8
-10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
6
4
Fig 10a.
Switching Time Test Circuit
t
d(on)
t
r
t
d(off)
t
f
2
V
GS
10%
0
25
50
75
100
125
150
175
T
C
, Case Temperature ( ° C)
90%
Fig 9.
Maximum Drain Current Vs.
Case Temperature
V
DS
Fig 10b.
Switching Time Waveforms
10
T herm al R es pons e (Z
th J C
)
1
D = 0 .5 0
0 .2 0
0 .1 0
0 .0 5
0.1
0 .0 2
0 .0 1
S IN G L E P U L S E
(T H E R M A L R E S P O N S E )
N o te s:
1 . D u ty fa c to r D = t
P
D M
t
1
t
2
1
/ t
2
0.01
0.00001
2. P e a k TJ = P D M x Z th JC + T C
0.0001
0.001
0.01
0.1
t
1
, R e c ta n g ula r P u lse D u ratio n (s e c )
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
2014-8-26
5
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-
10
V
DD
A
1
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