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Data Sheet
(Retired Product)
MBM29PL3200TE
Sheet
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Cover
This product has been retired and is not recommended for new designs. Availability of this document is retained for reference
and historical purposes only.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been
made are the result of normal data sheet improvement and are noted in the document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number
MBM29PL3200TE/BE
Revision
DS05-20890-6E
Issue Date
July 31, 2007
SPANSION
Data Sheet
TM
Flash Memory
September 2003
TM
This document specifies SPANSION memory products that are now offered by both Advanced Micro Devices and
Fujitsu. Although the document is marked with the name of the company that originally developed the specification,
these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a SPANSION
TM
product. Future routine
revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about SPANSION
solutions.
TM
memory
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(Continued)
The device provides truly high performance non-volatile Flash memory solution. The device offers fast page
access times of 25 ns and 35 ns with random access times of 70 ns and 90 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention, the device has separate chip enable (CE),
write enable (WE) and output enable (OE) controls. The page size is 8 words or 4 double words.
The device is command set compatible with JEDEC standard E
2
PROMs. Commands are written to the command
register using standard microprocessor write timings. Register contents serve as input to an internal state-
machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and
data needed for the programming and erase operations. Reading data out of the device is similar to reading
from 5.0 V and 12.0 V Flash or EPROM devices.
The device is programmed by executing the program command sequence. This will invoke the Embedded
Program
TM
* Algorithm, which is an internal algorithm that automatically times the program pulse widths and
verifies proper cell margins. Typically, each sector can be programmed and verified in about 1.3 seconds. Erase
is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
TM
* Algorithm,
which is an internal algorithm that automatically preprograms the array if it is not already programmed before
executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies
proper cell margins.
Any individual sector is typically erased and verified in 4 seconds (if already preprogrammed.)
The device also features a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The device is erased when shipped from the factory.
The device features single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
CC
detector automatically
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
7
,
by the Toggle Bit feature on DQ
6
, output pin. Once the end of a program or erase cycle has been completed,
the device internally resets to the read mode.
Fujitsu’s Flash technology combines years of Flash memory manufacturing experience to produce the highest
levels of quality, reliability, and cost effectiveness. The device memory electrically erases all bits within a sector
simultaneously via Fowler-Nordhiem tunneling. The words/double words are programmed one word/double word
at a time using the EPROM programming mechanism of hot electron injection.
*: Embedded Erase
TM
and Embedded Program
TM
are trademarks of Advanced Micro Devices, Inc.
Retired Product DS05-20890-6E_July 31, 2007
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