电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

MSM82C37B-5GS-2K

产品描述DMA Controller, 4 Channel(s), 5MHz, CMOS, PQFP44, 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小328KB,共34页
制造商OKI
官网地址http://www.oki.com
下载文档 详细参数 全文预览

MSM82C37B-5GS-2K概述

DMA Controller, 4 Channel(s), 5MHz, CMOS, PQFP44, 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44

MSM82C37B-5GS-2K规格参数

参数名称属性值
厂商名称OKI
零件包装代码QFP
包装说明QFP,
针数44
Reach Compliance Codeunknown
地址总线宽度8
最大时钟频率5 MHz
外部数据总线宽度8
JESD-30 代码R-PQFP-G44
长度10.5 mm
DMA 通道数量4
端子数量44
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码QFP
封装形状RECTANGULAR
封装形式FLATPACK
认证状态Not Qualified
座面最大高度2.25 mm
最大压摆率10 mA
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距0.8 mm
端子位置QUAD
宽度9.5 mm
uPs/uCs/外围集成电路类型DMA CONTROLLER

MSM82C37B-5GS-2K文档预览

E2O0016-39-81
¡ Semiconductor
MSM82C37B-5RS/GS/VJS
¡ Semiconductor
PROGRAMMABLE DMA CONTROLLER
This version: Aug. 1999
MSM82C37B-5RS/GS/VJS
Previous version: Jan. 1998
GENERAL DESCRIPTION
The MSM82C37B-5RS/GS/VJS, DMA (Direct Memory Access) controller is capable of high-
speed data transfer without CPU intervention and is used as a peripheral device in microcomputer
systems. The device features four independent programmable DMA channels.
Due to the use of silicon gate CMOS technology, standby current is 10
mA
(max.), and power
consumption is as low as 10 mA (max.) when a 5 MHz clock is generated.
All items of AC characteristics are compatible with intel 8237A-5.
FEATURES
• Maximum operating frequency of 5 MHz (Vcc = 5 V
±10%)
• High-speed operation at very low power consumption due to silicon gate CMOS technology
• Wide operating temperature range from –40°C to +85°C
• 4-channels independent DMA control
• DMA request masking and programming
• DMA request priority function
• DREQ and DACK input/output logic inversion
• DMA address increment/decrement selection
• Memory-to-Memory Transfers
• Channel extension by cascade connection
• DMA transfer termination by EOP input
• Intel 8237A-5 compatibility
• TTL Compatible
• 40-pin Plastic DIP (DIP40-P-600-2.54): (Product name: MSM82C37B-5RS)
• 44-pin Plastic QFJ (QFJ44-P-S650-1.27): (Product name: MSM82C37B-5VJS)
• 44-pin Plastic QFP (QFP44-P-910-0.80-2K): (Product name: MSM82C37B-5GS-2K)
1/33
¡ Semiconductor
MSM82C37B-5RS/GS/VJS
PIN CONFIGURATION (TOP VIEW)
40 pin Plastic DIP
IOR
IOW
MEMR
MEMW
NC
READY
HLDA
ADSTB
AEN
HRQ
CS
CLK
RESET
DACK
2
DACK
3
DREQ
3
DREQ
2
DREQ
1
DREQ
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GND 20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A
7
A
6
A
5
A
4
EOP
A
3
A
2
A
1
A
0
V
CC
(+5 V)
DB
0
DB
1
DB
2
DB
3
DB
4
DACK
0
DACK
1
DB
5
DB
6
DB
7
44 pin Plastic QFP
43
MEMW
42
MEMR
41
IOW
40
IOR
EOP
34
33 A
3
32 A
2
31 A
1
30 A
0
29 V
CC
28 NC
27 DB
0
26 DB
1
25 DB
2
24 DB
3
23 DB
4
44 NC
39 NC
A
7
37 A
6
A
5
36
38
READY
HLDA
ADSTB
AEN
HRQ
NC
CS
CLK
RESET
1
2
3
4
5
6
7
8
9
DACK
2
10
DACK
3
11
35
A
4
44 pin Plastic QFJ
5
MEMW
4
MEMR
3
IOW
40
EOP
39 NC
38 A
3
37 A
2
36 A
1
35 A
0
34 V
CC
33 DB
0
32 DB
1
31 DB
2
30 DB
3
29 DB
4
DREQ
3
12
DREQ
2
13
DREQ
1
14
DREQ
0
15
GND 16
NC 17
DB
7
18
DB
6
19
DB
5
20
DACK
1
21
DACK
0
22
2
IOR
6 NC
1 NC
44 A
7
43 A
6
42 A
5
DB
5
26
NC 7
READY 8
HLDA 9
ADSTB 10
AEN 11
HRQ 12
CS
13
CLK 14
RESET 15
DACK2 16
NC 17
DACK
3
18
DREQ
3
19
DREQ
2
20
DREQ
1
21
DREQ
0
22
GND 23
DB
7
24
DB
6
25
DACK
1
27
41 A
4
DACK
0
28
2/33
¡ Semiconductor
MSM82C37B-5RS/GS/VJS
BLOCK DIAGRAM
IOR
IOW
MEMR
MEMW
READY
ADSTB
AEN
CS
CLK
RESET
EOP
Base Word
Count
Register
(4
¥
16)
Current
Word
Count
Register
(4
¥
16)
Base
Address
Register
(4
¥
16)
Current
Address
Register
(4
¥
16)
TC
(Terminal Count)
Timing
Control
Circuit
Decrementer
Temporary Word
Count Register (16)
Incrementer/Decrementer
8 4
Temporary Address
Register (16)
4
Output
Buffer
Input/Output
Buffer
A
4 -
A
7
16 Bit Bus
16 Bit Bus
A
0 -
A
3
A
8
- A
15
Command
Control
Circuit
2
D
0 - 1
HLDA
HRQ
DREQ
0 - 3
DACK
0 - 3
Priority
4 Judgment
4
Circuit
Mode
Register
(4
¥
16)
Command
Register (8)
Mark
Register (4)
Request
Register (4)
Status
Register (8)
Temporary
Register (8)
Internal Data Bus
Input/Output
Buffer
DB
0 -
DB
7
3/33
¡ Semiconductor
MSM82C37B-5RS/GS/VJS
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Input Voltage
Output Voltage
Storage Temperature
Power Dissipation
Symbol
V
CC
V
IN
V
OUT
T
STG
P
D
Conditions
with respect
to GND
Ta = 25°C
1.0
Rating
MSM82C37B-5RS MSM82C37B-5GS MSM82C37B-5VJS
Unit
V
V
V
°C
–0.5 to +7
–0.5 to V
CC
+0.5
–0.5 to V
CC
+0.5
–55 to +150
0.7
1.0
W
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
Operating Temperature
"L" Input Voltage
"H" Input Voltage
Symbol
V
CC
T
op
V
IL
T
IH
Min.
4.5
–40
–0.5
2.2
Typ.
5.0
+25
Max.
5.5
+85
+0.8
V
CC
+ 0.5
Unit
V
°C
V
V
DC CHARACTERISTICS
Parameter
"L" Output Voltage
"H" Output Voltage
Input Leak Current
Output Leak Current
Average Power Supply
Current during Operations
Symbol
V
OL
V
OH
I
LI
I
LO
I
CC
Conditions
I
OL
= 3.2 mA
I
OH
= –1.0 mA
0V
£
V
IN
£
V
CC
0V
£
V
OUT
£
V
CC
Input frequency
5 MHz, when RESET
V
IN
= 0 V/V
CC
,
C
L
= 0 pF
HLDA = 0 V,
V
IL
= 0 V,
V
IH
= V
CC
V
CC
= 4.5 V
to 5.5 V
Ta = –40°C
to +85°C
Min.
3.7
–10
–10
Typ.
Max.
0.4
10
10
Unit
V
V
mA
mA
10
mA
Power Supply Current
in Standby Mode
I
CCS
10
mA
4/33
¡ Semiconductor
MSM82C37B-5RS/GS/VJS
AC CHARACTERISTICS
DMA (Master) Mode
Symbol
t
AEL
t
AET
t
AFAB
t
AFC
t
AFDB
t
AHR
t
AHS
t
AHW
Item
Delay Time from CLK Falling Edge
up to AEN Leading Edge
Delay Time from CLK Rising Edge
up to AEN Trailing Edge
Delay Time from CLK Rising Edge
up to Address Floating Status
Delay Time from CLK Rising Edge
up to Read/Write Signal Floating Status
Delay Time from CLK Rising Edge
up to Data Bus Floating Status
Address Valid Hold Time
to Read Signal Trailing Edge
Data Valid Hold Time
to ADSTB Trailing Edge
Address Valid Hold Time
to Write Signal Trailing Edge
Delay Time from CLK Falling Edge
up to Active DACK
t
AK
Delay Time from CLK Rising Edge
up to
EOP
Leading Edge
Delay Time from CLK Rising Edge
up to
EOP
Trailing Edge
t
ASM
t
ASS
t
CH
t
CL
t
CY
Time from CLK Rising Edge
up to Address Valid
Data Set-up Time to ADSTB Trailing Edge
Clock High-level Time
Clock Low-level Time
CLK Cycle Time
Min.
t
CY
– 100
30
t
CY
– 50
100
68
68
200
(Ta = –40 to +85°C, V
CC
= 4.5 to 5.5 V)
Comments
Max.
Unit
200
130
90
120
170
170
170
170
170
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 3)
(Note 5)
(Note 6)
(Note 6)
5/33
经典的Internet Explorer 7.0 for XP SP2 VISTA简体中文版
IE7中文版支持中文域名,包含了许多重大安全改进的Internet Explorer 7终于发布了最新正式版本。 微软通过其官方下载中心放出了Internet Explorer 7.0浏览器的升级版,版本号7.0.5730.13,支持 ......
zhaosiyun 嵌入式系统
TCP/IP详解卷1:协议(原书第2版)
《TCP/IP详解》是已故网络专家、著名技术作家W. Richard Stevens的传世之作,内容详尽且极具权,被誉为TCP/IP领域的不朽名著。 本书是《TCP/IP详解》第1卷的第2版,主要讲述TCP/IP协议,结 ......
arui1999 下载中心专版
充电盒改装 LED 灯
这几天在网上看到的,把废旧蓝牙耳机充电盒改装成 LED 灯,有创意 588353 588354 ...
dcexpert DIY/开源硬件专区
刘翔辉煌战绩
姓名:刘翔 性别:男 出生地:上海 生日:1983.7.13 身高:1.88米 体重:74公斤 项目:110米跨栏 2000年世界青年锦标赛男子110米栏第4名;2001年全运会、东亚运动会、世界大学生运动会男子110 ......
yanmei 聊聊、笑笑、闹闹
分频系数可变的分频器设计
通过上位机任意给定一个2进制数据,用verilog实现对50M基于此2进制为分频系数的分频器设计实现,求各位大神指导! ...
boris1230 FPGA/CPLD
【转载】PCB叠层参考
转自世纪芯抄板公司 PCB叠层参考 ------------------------------------------------------------------------------ 名词定义:SIG:信号层;GND:地层; ......
okhxyyo PCB设计

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 226  2699  1843  2356  2546  4  13  48  3  1 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved