Intel
®
IXP43X Product Line of Network
Processors
Datasheet
Product Features
This document describes the features of the Intel
®
IXP43X Product Line of Network Processors. Refer
to
Section 1.0
for a complete list of all the features. Some of these features require enabling software
supplied by Intel. Refer to the
Intel
®
IXP400 Software Programmer’s Guide
for information on
features that are currently enabled.
These features do
not
require
enabling software
Intel XScale
®
Processor — Up to
667 MHz
PCI v. 2.2 32-bit 33 MHz (Host/
Option)
Two USB v2.0 Host Controller
DDRI-266 MHz/DDRII-400MHz
SDRAM Interface
Slave Interface Expansion bus
One UART
Internal Bus Performance Monitoring
Unit
16 GPIO
Four Internal Timers
Synchronous Serial Protocol (SSP)
Port
I
2
C Interface
Packaging
— 460-Pin PBGA
— Commercial Temperature
— Lead-Free Support
These features require enabling
software. For information on
features that are currently enabled
see the
Intel
®
IXP400 Software
Programmer’s Guide.
Encryption/Authentication (AES/
AES-CCM/3DES/DES/SHA-1/SHA-256/
SHA-384/SHA-512/MD-5)
One High-Speed Serial Interface
Two Network Processor Engines
Up to two MII Interfaces
One UTOPIA Level 2 Interface
Typical Applications
SOHO-Small Business/ Residential
Modular Router
Wireless Gateway (802.11a/b/g)
Network-Attached Storage
Wired/Wireless RFID Readers
Digital Media Adapter
VoIP Router
Video Phone
Security Gateway/Router
Network Printers
Wireless Media Gateway
IP Set Top box
Document Number:
316842;
Revision:
001US
April 2007
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS
OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING
TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE,
MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for
use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Legal Lines and Disclaimers
Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics
of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for
conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with
this information.
The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-
4725, or by visiting
Intel’s Web Site.
Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different
processor families. See
http://www.intel.com/products/processor_number
for details.
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IntelDX2, IntelDX4, IntelSX2, Intel Core, Intel Inside, Intel Inside logo, Intel. Leap ahead., Intel. Leap ahead. logo, Intel NetBurst, Intel NetMerge, Intel
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*Other names and brands may be claimed as the property of others.
Copyright © 2007, Intel Corporation. All rights reserved.
Intel
®
IXP43X Product Line of Network Processors
Datasheet
2
April 2007
Document Number:
316842;
Revision:
001US
Datasheet—Intel
®
IXP43X Product Line of Network Processors
Contents
1.0
Features of the Intel
®
IXP43X Product Line of Network Processors
........................... 9
1.1
Product Line Features .......................................................................................... 9
1.2
Model Specific Features ...................................................................................... 12
About This Document
.............................................................................................. 13
Functional Overview
................................................................................................ 13
3.1
Key Functional Units .......................................................................................... 19
3.1.1 Network Processor Engines (NPEs)............................................................ 19
3.1.2 Internal Bus .......................................................................................... 20
3.1.2.1 North AHB ............................................................................... 20
3.1.2.2 South AHB ............................................................................... 21
3.1.2.3 Memory Port Interface............................................................... 21
3.1.2.4 APB Bus .................................................................................. 21
3.1.3 MII Interfaces ........................................................................................ 22
3.1.4 UTOPIA Level 2 Interface ........................................................................ 22
3.1.5 USB Version 2.0 Host Interface ................................................................ 22
3.1.6 PCI Controller ........................................................................................ 23
3.1.7 DDRII/DDRI Memory Controller................................................................ 23
3.1.8 Expansion Interface ................................................................................ 26
3.1.9 High-Speed Serial Interface ..................................................................... 26
3.1.10 UART Interface ...................................................................................... 26
3.1.11 GPIO .................................................................................................... 27
3.1.12 Internal Bus Performance Monitoring Unit (IBPMU) ..................................... 27
3.1.13 Interrupt Controller ................................................................................ 28
3.1.14 Timers .................................................................................................. 28
3.1.15 Synchronous Serial Port Interface............................................................. 28
3.1.16 AES/DES/SHA/MD-5 ............................................................................... 29
3.1.17 Queue Manager...................................................................................... 29
3.2
Intel XScale
®
Processor ..................................................................................... 29
3.2.1 Super Pipeline........................................................................................ 30
3.2.2 Branch Target Buffer .............................................................................. 31
3.2.3 Instruction Memory Management Unit ....................................................... 32
3.2.4 Data Memory Management Unit ............................................................... 32
3.2.5 Instruction Cache ................................................................................... 33
3.2.6 Data Cache ........................................................................................... 33
3.2.7 Mini-Data Cache..................................................................................... 33
3.2.8 Fill Buffer and Pend Buffer ....................................................................... 34
3.2.9 Write Buffer........................................................................................... 34
3.2.10 Multiply-Accumulate Coprocessor ............................................................. 34
3.2.11 Performance Monitoring Unit .................................................................... 35
3.2.12 Debug Unit ............................................................................................ 35
Package Information
............................................................................................... 36
4.1
Functional Signal Definitions ............................................................................... 36
4.1.1 Pin Types .............................................................................................. 36
4.1.2 Pin Description Tables ............................................................................. 37
4.2
Package Description .......................................................................................... 60
4.3
Signal-Pin Description ........................................................................................ 62
4.4
Package Thermal Specifications ........................................................................... 86
Electrical Specifications
........................................................................................... 86
5.1
Absolute Maximum Ratings and Operating Conditions............................................. 86
5.2
V
CCA
, V
CCP_OSC
, V
CCAUPLL
and V
CCAUBG
Pin Requirements......................................... 87
2.0
3.0
4.0
5.0
April 2007
Document Number:
316842;
Revision:
001US
Intel
®
IXP43X Product Line of Network Processors
Datasheet
3
Intel
®
IXP43X Product Line of Network Processors—Datasheet
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.2.1 V
CCA
Requirements .................................................................................87
5.2.2 V
CCP_OSC
Requirements ...........................................................................88
5.2.3 V
CCAUPLL
Requirements ............................................................................88
5.2.4 V
CCAUBG
Requirements ............................................................................89
DDRII/DDRI RCOMP and Slew Resistances Pin Requirements ...................................89
DDRII OCD Pin Requirements ..............................................................................90
USB RCOMP and ICOMP Pin Requirements.............................................................91
DC Specifications ...............................................................................................92
5.6.1 PCI DC Parameters .................................................................................92
5.6.2 USB DC Parameters ................................................................................93
5.6.3 UTOPIA Level 2 DC Parameters.................................................................94
5.6.4 MII DC Parameters .................................................................................94
5.6.5 Management Data Interface (MDI) DC Parameters (MDC, MDIO)...................94
5.6.6 DDR SDRAM Bus DC Parameters ...............................................................95
5.6.7 Expansion Bus DC Parameters ..................................................................96
5.6.8 High-Speed Serial Interface DC Parameters................................................96
5.6.9 UART DC Parameters...............................................................................97
5.6.10 Serial Peripheral Interface DC parameters ..................................................97
5.6.11 GPIO DC Parameters ...............................................................................97
5.6.12 JTAG DC Parameters ...............................................................................98
5.6.13 Reset DC Parameters ..............................................................................98
5.6.14 Remaining I/O DC Parameters ..................................................................98
AC Specifications ...............................................................................................99
5.7.1 Clock Signal Timings ...............................................................................99
5.7.1.1 Processors’ Clock Timings ...........................................................99
5.7.1.2 PCI Clock Timings ................................................................... 101
5.7.1.3 MII Clock Timings.................................................................... 101
5.7.1.4 UTOPIA Level 2 Clock Timings ................................................... 101
5.7.1.5 Expansion Bus Clock Timings .................................................... 101
5.7.2 Bus Signal Timings................................................................................ 101
5.7.2.1 PCI........................................................................................ 102
5.7.2.2 USB Version 2.0 Interface ........................................................ 103
5.7.2.3 UTOPIA Level 2 (33 MHz) ......................................................... 103
5.7.2.4 MII........................................................................................ 104
5.7.2.5 MDIO..................................................................................... 105
5.7.2.6 DDR SDRAM Bus ..................................................................... 106
5.7.2.7 Expansion Bus ........................................................................ 110
5.7.2.8 Serial Peripheral Port Interface Timing ....................................... 118
5.7.2.9 High-Speed, Serial Interface ..................................................... 119
5.7.2.10 JTAG ..................................................................................... 120
5.7.3 Reset .................................................................................................. 121
5.7.3.1 Cold Reset.............................................................................. 121
5.7.3.2 Hardware Warm Reset ............................................................. 122
5.7.3.3 Soft Reset .............................................................................. 122
5.7.3.4 Reset Timings ......................................................................... 123
Power Sequence .............................................................................................. 124
Power Dissipation ............................................................................................ 125
Ordering Information ....................................................................................... 125
Figures
1
2
3
4
5
6
Intel
®
IXP435 Network Processor Block Diagram ..........................................................14
Intel
®
IXP433 Network Processor Block Diagram ..........................................................15
Intel
®
IXP432 Network Processor Block Diagram ..........................................................16
Intel
®
IXP431 Network Processor Block Diagram ..........................................................17
Intel
®
IXP430 Network Processor Block Diagram ..........................................................18
Intel XScale
®
Technology Block Diagram .....................................................................30
Intel
®
IXP43X Product Line of Network Processors
Datasheet
4
April 2007
Document Number:
316842;
Revision:
001US
Datasheet—Intel
®
IXP43X Product Line of Network Processors
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12
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14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
460-Pin PBGA Package (Side View)............................................................................. 60
460-Pin PBGA Package (Top and Bottom View) ............................................................ 61
V
CCA
Power Filtering Diagram .................................................................................... 87
V
CCP_OSC
Power Filtering Diagram .............................................................................. 88
V
CCAUPLL
Power Filtering Diagram ............................................................................... 88
V
CCAUBG
Power Filtering Diagram................................................................................ 89
DDRII/DDRI RCOMP Pin External Resistor Requirements ............................................... 90
DDRII OCD Pin Requirements .................................................................................... 90
USB RCOMP and ICOMP Pin External Resistor Requirement ............................................ 91
Typical Connection to an Oscillator ........................................................................... 100
Typical Connection to a Crystal ................................................................................ 100
PCI Output Timing.................................................................................................. 102
PCI Input Timing.................................................................................................... 102
UTOPIA Level 2 Input Timings.................................................................................. 103
UTOPIA Level 2 Output Timings ............................................................................... 104
MII Output Timings ................................................................................................ 104
MII Input Timings .................................................................................................. 105
MDIO Output Timings ............................................................................................. 105
MDIO Input Timings ............................................................................................... 106
DDR Clock Timing Waveform ................................................................................... 106
DDR SDRAM Write Timings...................................................................................... 107
DDR SDRAM Read Timings ...................................................................................... 108
DDR - Write Preamble/Postamble Durations............................................................... 108
Expansion Bus Synchronous Timing .......................................................................... 110
Intel Multiplexed Mode............................................................................................ 111
Intel Simplex Mode ................................................................................................ 112
Motorola* Multiplexed Mode .................................................................................... 113
Motorola* Simplex Mode ......................................................................................... 115
I/O Wait Normal Phase Timing ................................................................................. 117
I/O Wait Extended Phase Timing .............................................................................. 117
Serial Peripheral Interface Timing............................................................................. 118
High-Speed Serial Timings ...................................................................................... 119
Boundary-Scan General Timings .............................................................................. 120
Boundary-Scan Reset Timings.................................................................................. 121
Reset Timings........................................................................................................ 123
Power-up Sequence Timing ..................................................................................... 124
Intel
®
IXP43X Product Line of Network Processors Features ........................................... 12
Related Documents .................................................................................................. 13
Network Processor Functions ..................................................................................... 19
Supported DDRI 32-bit SDRAM Configurations ............................................................. 24
Supported DDRII 32-bit SDRAM Configurations ............................................................ 25
Supported DDRI 16-bit SDRAM Configurations ............................................................. 25
Supported DDRII 16-bit SDRAM Configurations ............................................................ 25
GPIO Alternate Function Table ................................................................................... 27
Signal Type Definitions ............................................................................................. 36
Processors’ Signal Interface Summary Table ................................................................ 37
DDRII/I SDRAM Interface.......................................................................................... 39
PCI Controller.......................................................................................................... 41
High-Speed, Serial Interface 0 ................................................................................... 44
UTOPIA Level 2/MII_A .............................................................................................. 46
MII-C Interface ........................................................................................................ 51
Expansion Bus Interface............................................................................................ 52
UART Interface ........................................................................................................ 53
Tables
April 2007
Document Number:
316842;
Revision:
001US
Intel
®
IXP43X Product Line of Network Processors
Datasheet
5
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