BR93L56-W/F-W/RF-W/FJ-W/RFJ-W/FV-W
/RFV-W/RFVM-W
BR93L66-W/F-W/RF-W/FJ-W/RFJ-W/FV-W
/RFV-W/RFVM-W
Features
• 2k bit serial EEPROM organized as 128
×
16bit (BR93L56)
4k bit serial EEPROM organized as 256
×
16bit (BR93L66)
• Low voltage operation
Read : 1.8~5.5V
Write : 1.8~5.5V
• Low current consumption
Active : 1.5mA MAX (Vcc=1.8~2.5V)
3mA MAX (Vcc=2.5~5.5V)
Standby : 2µA MAX
• Clock frequency : 500kHz MAX (Vcc=1.8~2.5V)
2MHz MAX (Vcc=2.5~5.5V)
• Write cycle time : 5ms MAX
Pin Configurations
BR93L56-W
BR93L66-W
CS 1
SK 2
DI 3
DO 4
8 Vcc
7 NC
6 NC
5 GND
BR93L56F-W/
FJ-W/FV-W
BR93L66F-W/
FJ-W/FV-W
NC 1
Vcc 2
CS 3
SK 4
8 NC
7 GND
6 DO
5 DI
DIP8
BR93L56RF-W/RFJ-W/
RFV-W/RFVM-W
BR93L66RF-W/RFJ-W/
RFV-W/RFVM-W
CS 1
SK 2
8 Vcc
7 NC
SOP8/SOP-J8/SSOP-B8
• Address auto-increment function during read operation
DI 3
6 NC
• Automatic erase-before-write function during write operation
DO 4
5 GND
• Inadvertent write protection function
SOP8/SOP-J8/SSOP-B8/MSOP8
Defaults to power up with write-disabled state
Pin Functions
Software instructions for write-enable/disable
Inadvertent write protection at low voltage (Vcc Lock-out function)
Functions
Pin Names
• READY/BUSY Status indicator function (DO pin)
Chip Select
CS
• Schmitt trigger circuit & noise filter are built into SK, DI pin.
SK
Serial Data Clock
• TTL compatible input/output
DI
Serial Data Input
• 1,000,000 write cycle typical
• 40 years data retention
• Operating temperature range : -40~85˚C
DO
GND
Vcc
Serial Data Output
Ground
Power Supply
Block Diagram
CS
Instruction Decode
Control
Clock Generation
Voltage
Detection
SK
Write
Disable
Address
7bit:
BR93L56
Buffer
8bit:
BR93L66
High Voltage
Generation
DI
Instruction
Register
Address
7bit:
BR93L56
Decoder
8bit:
BR93L66
DO
Data
Register
16bit
R/W
Amps
2~4k bit
EEPROM
Array
16bit
13
1.8V
L
opeow vo
ratin ltag
e
g
1,
Wri 0 0 0 , 0 0
te c 0
ycle
Serial 3 Wire Interface
Timing chart
Read cycle
SK
CS
1
2
4
11
12
27
28
*
1
DI
DO
1
1
0
A
7
A
6
A
5
A
1
A
0
0
D
15
D
14
Read Data
(n)
Hi-Z
D
1
D
0
D
15
D
14
Read Data
(n+1)
Write cycle
SK
CS
1
2
4
11
12
27
STATUS
*
1
DI
DO
1
0
1
A
7
A
6
A
5
A
1
A
0
D
15
D
14
D
1
D
0
BUSY
READY
Hi-Z
t
E
/w
Write all registers cycle
SK
CS
DI
DO
1
0
0
0
1
D
15
D
14
D
1
D
0
1
2
5
12
27
STATUS
BUSY
READY
Hi-Z
t
E
/w
Write enable / disable cycle
SK
CS
DI
DO
1
0
0
ENABLE = 1 1
DISABLE = 0 0
Hi-Z
*1: A7=0 (BR93L56)
Note : BR93LC56/F/RF/FJ/RFJ/FV, BR93LC66/F/RF/FJ/RFJ/FV are single-cell types.
Please be careful not to confuse w-cell type and single-cell type. ("-W" means double-cell type.)
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