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IRHNJ597130

产品描述Power Field-Effect Transistor, 12.5A I(D), 100V, 0.205ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD0.5, 3 PIN
产品类别分立半导体    晶体管   
文件大小130KB,共8页
制造商Infineon(英飞凌)
官网地址http://www.infineon.com/
下载文档 详细参数 全文预览

IRHNJ597130概述

Power Field-Effect Transistor, 12.5A I(D), 100V, 0.205ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD0.5, 3 PIN

IRHNJ597130规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Infineon(英飞凌)
包装说明CHIP CARRIER, R-PBCC-N3
Reach Compliance Codenot_compliant
ECCN代码EAR99
其他特性ULTRA-LOW RESISTANCE
雪崩能效等级(Eas)96 mJ
外壳连接DRAIN
配置SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压100 V
最大漏极电流 (Abs) (ID)12.5 A
最大漏极电流 (ID)12.5 A
最大漏源导通电阻0.205 Ω
FET 技术METAL-OXIDE SEMICONDUCTOR
JESD-30 代码R-PBCC-N3
JESD-609代码e0
元件数量1
端子数量3
工作模式ENHANCEMENT MODE
最高工作温度150 °C
封装主体材料PLASTIC/EPOXY
封装形状RECTANGULAR
封装形式CHIP CARRIER
峰值回流温度(摄氏度)NOT SPECIFIED
极性/信道类型P-CHANNEL
最大功率耗散 (Abs)75 W
最大脉冲漏极电流 (IDM)50 A
认证状态Not Qualified
表面贴装YES
端子面层Tin/Lead (Sn/Pb)
端子形式NO LEAD
端子位置BOTTOM
处于峰值回流温度下的最长时间NOT SPECIFIED
晶体管应用SWITCHING
晶体管元件材料SILICON

IRHNJ597130文档预览

PD-94047B
IRHNJ597130
RADIATION HARDENED
JANSR2N7545U3
REF: MIL-PRF-19500/712
POWER MOSFET
100V, P-CHANNEL
SURFACE MOUNT (SMD-0.5)
Product Summary
Part Number
IRHNJ597130
IRHNJ593130
Radiation Level
100K Rads (Si)
300K Rads (Si)
R
ds(on)
0.205
0.205
I
D
-12.5A
-12.5A
QPL Part Number
JANSR2N7545U3
JANSF2N7545U3
5

™
TECHNOLOGY
SMD-0.5
International Rectifier’s R5
TM
technology provides high
performance power MOSFETs for space applications.
These devices have been characterized for Single
Event Effects (SEE) with useful performance up to an
LET of 80 (MeV/(mg/cm
2
)). The combination of low
R
DS(on)
and low gate charge reduces the power losses
in switching applications such as DC to DC converters
and motor control. These devices retain all of the well
established advantages of MOSFETs such as voltage
control, fast switching, ease of paralleling and
temperature stability of electrical parameters.
Features:
n
n
n
n
n
n
n
n
n
Single Event Effect (SEE) Hardened
Ultra Low R
DS(on)
Low Total Gate Charge
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
Ceramic Package
Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = -12V, TC = 25°C Continuous Drain Current
ID @ VGS = -12V, TC = 100°C Continuous Drain Current
IDM
Pulsed Drain Current
À
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Á
Avalanche Current
À
Repetitive Avalanche Energy
À
Peak Diode Recovery dv/dt
Â
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
300 ( for 5s )
1.0 ( Typical )
-12.5
-8.0
-50
75
0.6
±20
96
-12.5
7.5
-6.2
-55 to 150
Pre-Irradiation
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
o
C
g
For footnotes refer to the last page
www.irf.com
1
02/16/06
IRHNJ597130, JANSR2N7545U3
Pre-Irradiation
Electrical Characteristics
@ Tj = 25°C (Unless Otherwise Specified)
Parameter
BVDSS
Drain-to-Source Breakdown Voltage
∆BV
DSS/∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Min
-100
-2.0
6.3
Typ Max Units
-0.12
4.0
0.205
-4.0
-10
-25
-100
100
45
16
11
25
55
30
100
V
V/°C
V
S( )
µA
Test Conditions
VGS = 0V, ID = -1.0mA
Reference to 25°C, ID = -1.0mA
VGS = -12V, ID = -8.0A
Ã
VDS = VGS, ID = -1.0mA
VDS > -15V, IDS = -8.0A
Ã
VDS= -80V ,VGS=0V
VDS = -80V,
VGS = 0V, TJ = 125°C
VGS = -20V
VGS = 20V
VGS =-12V, ID = -12.5A
VDS = -50V
VDD = -50V, ID = -12.5A,
VGS =-12V, RG =
7.5Ω
IGSS
IGSS
Qg
Q gs
Q gd
td
(on)
tr
td
(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
nA
nC
ns
nH
Measured from the center of
drain pad to center of source pad
VGS = 0V, VDS = -25V
f = 1.0MHz
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
1372
326
20
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
t rr
Q RR
ton
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode)
À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min Typ Max Units
-12.5
-50
-5.0
191
778
Test Conditions
A
V
ns
nC
T
j
= 25°C, IS = -12.5A, VGS = 0V
Ã
Tj = 25°C, IF =-12.5A, di/dt
-100A/µs
VDD
-50V
Ã
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
RthJ-PCB
Junction-to-Case
Junction-to-PC board
Min Typ Max
6.9
1.67
Units
°C/W
Test Conditions
soldered to a 2” square copper-clad board
Note: Corresponding Spice and Saber models are available on the International Rectifier Website.
For footnotes refer to the last page
2
www.irf.com
Radiation Characteristics
Pre-Irradiation
IRHNJ597130, JANSR2N7545U3
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation
ÄÅ
Parameter
BV
DSS
V
GS(th)
I
GSS
I
GSS
I
DSS
R
DS(on)
R
DS(on)
V
SD
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source
Ã
On-State Resistance (TO-3)
Static Drain-to-Source
Ã
On-State Resistance (SMD-0.5)
Diode Forward Voltage
Ã
100K Rads(Si)
1
Min
Max
-100
-2.0
-4.0
-100
100
-10
0.205
0.205
-5.0
300KRads(Si)
2
Min
Max
-100
-2.0
-5.0
-100
100
-10
0.205
0.205
-5.0
Units
V
nA
µA
V
Test Conditions
V
GS
= 0V, I
D
= -1.0mA
V
GS
= V
DS
, I
D
= -1.0mA
V
GS
=-20V
V
GS
= 20 V
V
DS
=-80V, V
GS
=0V
V
GS
= -12V, I
D
=-8.0A
V
GS
= -12V, I
D
=-8.0A
V
GS
= 0V, IS = -12.5A
1. Part number IRHNJ597130 (JANSR2N7545U3)
2. Part number IRHNJ593130 (JANSF2N7545U3)
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion
Br
I
Au
LET
(MeV/(mg/cm
2
))
37.9
59.7
82.3
Energy
(MeV)
252.6
314
350
V
DS
(V)
Range
(µm)
@V
GS
=0V @V
GS
=5V @V
GS
=10V @V
GS
=15V @V
GS
=17.5V @V
GS
=20V
33.1
-100
-100
-100
-100
-100
-100
30.5
-100
-100
-100
-100
-75
-25
28.4
-100
-100
-100
-30
-120
-100
-80
VDS
-60
Br
I
Au
-40
-20
0
0
5
10
15
20
25
VGS
Fig a.
Single Event Effect, Safe Operating Area
For footnotes refer to the last page
www.irf.com
3
IRHNJ597130, JANSR2N7545U3
Pre-Irradiation
100
10
-I
D
, Drain-to-Source Current (A)
-I
D
, Drain-to-Source Current (A)
VGS
-15V
-12V
-10V
-9.0V
-8.0V
-7.0V
-6.0V
BOTTOM -5.0V
TOP
100
VGS
-15V
-12V
-10V
-9.0V
-8.0V
-7.0V
-6.0V
BOTTOM -5.0V
TOP
10
-5.0V
-5.0V
1
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
1
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
-V
DS
, Drain-to-Source Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.5
-I
D
, Drain-to-Source Current (A)
T
J
= 25
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= -12.5A
2.0
T
J
= 150
°
C
10
1.5
1.0
0.5
1
5
6
7
8
V DS =
15
-25V
20µs PULSE WIDTH
9
10
11
0.0
-60 -40 -20
V
GS
= -12V
0
20
40
60
80 100 120 140 160
-V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
4
www.irf.com
Pre-Irradiation
IRHNJ597130, JANSR2N7545U3
2000
1600
-V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
20
I
D
= -12.5A
V
DS
=-80V
V
DS
=-50V
V
DS
=-20V
16
C, Capacitance (pF)
Ciss
1200
12
800
Coss
8
400
4
Crss
0
1
10
100
0
0
10
20
FOR TEST CIRCUIT
SEE FIGURE 13
30
40
-V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
-I D, Drain-to-Source Current (A)
-I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
T
J
= 150
°
C
T
J
= 25
°
C
10
100µs
1ms
1
1
Tc = 25°C
Tj = 150°C
Single Pulse
0.1
1
10
10ms
0.1
0.0
V
GS
= 0 V
1.0
2.0
3.0
4.0
5.0
-V
SD
,Source-to-Drain Voltage (V)
100
1000
-VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
www.irf.com
5
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