SMB206A/7A/8A
Preliminary
1
(See Last Page)
Dual Programmable Buck Regulators with Integrated MOSFETs and Digital
Control
FEATURES & APPLICATIONS
FEATURES
•
Dual Step-Down DC-DC Outputs
-
Integrated power MOSFET switches
-
1A-3A output current with built in current limit
-
Input voltage range: +4.5V to +16V
-
Output voltage +0.8V to +5.0V (+/-2.5% accuracy)
-
Automatic PFM mode for light load efficiency
-
Integrated frequency compensation
•
Integrated Power Control and Programmability
2
-
I C Digital or Pin Control (Enable)
-
Static and Dynamic Programmable Output Voltage
•
•
•
128 levels of output voltage settings
“Coarse” nominal setpoint
0.8V-1.8V and 2.3/2.5/3.0/3.3/5.0V
INTRODUCTION
The SMB206A/7A/8A are highly integrated and flexible dual-
output DC-DC regulators designed for use in a wide variety of
applications. High integration reduces system cost and
component count, while the built-in non-volatile digital
programmability cuts development time by allowing system
designers to custom tailor the device to suit almost any
application.
The SMB206A/7A/8A includes integrated high-side MOSFET
switches for up to 1A-3A continuous output current.
Programmable output voltages as low as +0.8V support the
latest VLSI digital cores. Minimum external components result
in a very compact solution size for space constrained
applications.
Sophisticated power control/monitoring functions required by
2
many systems are built-in and accessible via digital I C
interface. These include digitally programmable output voltage
setpoint,
power-up/down
softstart
and
sequencing,
independent enable/disable, output UV monitoring with
PowerGood/Reset output. Additionally, fine resolution voltage
margining is provided to allow for sophisticated system
optimization.
The integration of features and built-in flexibility of the
SMB206A/7A/8A allow the system designer to create a
“platform solution” that can be easily modified without
hardware changes. The SMB206A/7A/8A are well suited to
applications with an input range of +4.5V to +16V. The
o
o
operating temperature range is -40 C to +85 C and the
available packages are 3mm X 3mm 20-pad QFN or 6.5mm X
6.4mm TSSOP-24.
-
-
-
-
“Fine” Margining
+1.14% to +7.95% (vs. coarse
setting)
o
PWM frequency 500-1000kHz with 180 interleave
Output enable and power up/down sequence
Programmable output softstart/stop
Output UV monitoring with PGOOD/RESET output
APPLICATIONS
•
Digital LCD/Plasma TV
•
Digital Set-Top Box/PVR/DVR
•
Datacom/Telecom Equipment
Figure 1 - SIMPLIFIED APPLICATION
SMB206A/7A/8A
+4.5V to +16V
DC IN
Step-Down 0
int. FET
I2C I/F
Enable Inputs
PGOOD/RESET Output
SMB206A - 3A+3A
SMB207A - 1A+1A
SMB208A - 2A+2A
0.8V-VIN (Prog.)
up to 1A-3A
CPU/SoC
System
Control
and
Monitoring
Step-Down 1
int. FET
0.8V-VIN (Prog.)
up to 1A-3A
Memory
SUMMIT
Microelectronics, Inc. 2012
• 757 N. Mary Ave • Sunnyvale CA 94085 • Phone 408 523-1000 • FAX 408 523-1266
http://www.summitmicro.com/
2147 2.4 2/23/2012
1
SMB206A/7A/8A
Preliminary
GENERAL DESCRIPTION
DIGITAL INTERFACE/NON-VOLATILE
PROGRAMMING
2
The built-in serial digital I C/SMBus compatible port and
built-in non-volatile programming bring several benefits
to power supply design with the SMB206A/7A/8A. Many
external components are eliminated that would
otherwise be used to set configuration and parametric
values. Additionally, the digital interface allows for quick
and easy development and debug without hardware
changes. Finally, after the non-volatile power-up
configuration, the serial port can be used to re-program
the SMB206A/7A/8A by host software after the system is
running. For quick programming development and debug
use Summit’s prebuilt evaluation kit including a PC-
based graphical user interface (GUI).
DUAL PWM DC-DC REGULATORS
The SMB206A/7A/8A contains two integrated PWM DC-
DC step-down (buck) regulator(s) with identical features
and functions. The input voltage range is +4.5V to +16V
to support a wide variety of system applications. The
outputs support a full 1A-3A continuous output current
with a built-in cycle-by-cycle current limit. The output
voltage range is +0.8V and +5.0V and fully
programmable in non-volatile (static) or volatile
(dynamic, on-the-fly) via the serial digital interface. The
nominal “coarse” (100mV steps) voltage programming
provides flexibility for various types of loads without
hardware changes. In the SMB206A/7A/8A the “fine”
programming provides “margining” capability for
sophisticated system validation and optimization.
Built-in high-side MOSFETs work in conjunction with
external Schottky diode rectifiers in constant frequency
PWM-mode at high load currents or high efficiency pulse
skipping PFM-mode at light loads. Switching frequency
is programmable (500kHz/1000kHz) to trade off
efficiency and component size. Each output switches
o
180 out of phase with the other to reduce input ripple
current, switching noise and input capacitance
requirement. Bootstrapped high-side drive improves
efficiency and extends the operating voltage range.
Frequency compensation is fully integrated to further
reduce component count and cost.
POWER CONTROL/MANAGEMENT FUNCTIONS
The SMB206A/7A/8A integrates several power
management functions that are typically otherwise
performed by external circuits. These include output
sequencing with programmable timing, hardware or
software-based
output
enable/disable,
and
programmable softstart timing. Also, the output voltages
are monitored with a programmable PGOOD/RESET
output (PGOOD asserts immediately, RESET delays
125ms). Software Enable bits and hardware Enable pins
work together to provide flexible power up/down and
manual/auto sequencing.
The
SMB206A/7A/8A
also
supports
digitally
programmable dynamic output voltage. The non-volatile
setting determines the power-up/static value but it can
be re-programmed by software via the serial interface.
The settings are +0.8V to +5.0V and can support
dynamic voltage/clock CPU cores or low power memory
modes.
SUMMIT Microelectronics, Inc.
2147 2.4 2/23/2012
2
SMB206A/7A/8A
Preliminary
Figure 2 - TYPICAL APPLICATION
SMB206A - 3A+3A
SMB207A - 1A+1A
SMB208A - 2A+2A
BST0
UVLO
0.1uF
PWM
SW0(2)
2.2uH-6.8uH
SMB206A/7A/8A
+4.5V to +16V
PVIN(4)
AVIN
VDD
1uF
SDA
SCL
EN1
EN0
PGOOD/RESET
NV OTP
Sequencer
Softstart
Vref
GND
I2C I/F
Digital
Control
Internal
5V LDO
Oscillator
Θ0
Θ1
BST1
Output
Voltage
PWM
0.1uF
SW1(2)
FB1
1A-3A
4.7uF
+0.8V to VIN @ 1A-3A
FB0
1A-3A
4.7/10/
22uF
Optional for custom
output voltages
2.2uH-6.8uH
+0.8V to VIN @ 1A-3A
4.7/10/
22uF
Optional for custom
output voltages
PIN DESCRIPTION
QFN-20 Pin #
16, 17, 19, 20
18
12
4, PAD
9
10
7,6
14, 15, 1, 2
13, 3
11, 5
8
NA
TSSOP Pin #*
3, 4, 22, 23
2
18
8, PAD
15
16
11, 10
20, 21, 5, 6
19, 7
17, 9
14
1, 12, 13, 24
Pin Name
PVIN
AVIN
VDD
GND
SCL
SDA
EN(0/1)
SW0/1
BST0/1
FB0/1
PGOOD/
RESET
NC
Pin Type
Power
Power
Power
Ground
Input
I/O
Input
Output
Input
Input
Output
NC
Pin Description
Power Input - Connect to +4.5V to +16V source. Bypass with 4.7uF
MLCC
Analog Power Input - Connect to +4.5V to +16V source (same as PVIN)
Internal VDD - +5V internal supply. Bypass with 1uF typical MLCC
Ground – Connect to PCB isolated ground
I
2
C Clock
I
2
C Data
Enable 0/1 – Enables output, high true
Switch Node 0/1 – Connect to output inductors
Bootstrap Input – Connect to 0.1uF capacitor to switch node
Feedback Input 0/1 – Connect to output sense node
PowerGood/RESET Output – Output UV monitor signal (high true, open
drain)
Not Connected
*Contact factory for TSSOP package
SUMMIT Microelectronics, Inc.
2147 2.4 2/23/2012
3
SMB206A/7A/8A
Preliminary
Figure 3 - PACKAGE AND PINOUT
PVIN1
PVIN1
PVIN0
17
20
19
18
16
SW1
SW1
BST1
GND
FB1
1
2
3
4
5
PVIN0
AVIN
15
SW0
SW0
BST0
VDD
FB0
SMB206A/7A/8A
3mm x 3mm QFN-20
(Top View)
Pad = GND
14
13
12
11
6
7
8
9
10
NC
AVIN
PVIN1
PVIN1
SW1
SW1
BST1
GND
FB1
EN1
EN0
NC
1
2
3
4
5
6
7
PGOOD/
RESET
SDA
EN1
EN0
SCL
24
23
22
21
20
19
18
NC
PVIN0
PVIN0
SW0
SW0
BST0
VDD
FB0
SDA
SCL
PGOOD/RESET
NC
SMB206A/7A/8A
6.4mm x 6.5mm
TSSOP-24 (Exposed Pad)
(Top View)
Pad = GND
8
9
10
11
12
17
16
15
14
13
*Contact factory for TSSOP package
SUMMIT Microelectronics, Inc.
2147 2.4 2/23/2012
4
SMB206A/7A/8A
Preliminary
Figure 4 - TYPICAL OUTPUT TIMING DIAGRAM
PVIN
Static and Dynamic Output Voltage Settings
128-levels 0.8V-1.8V 100mV steps
plus 2.3/2.5/3.0/3.3/5.0V
VDD
V
UVLO
VOUT0
VOUT1
VO
UT
0
V
PG0
(90% VOUT0)
V
PG1
(90% VOUT1)
VO
UT
1
Dont
Care
EN0,1
Auto sequence bits = 01b
10ms
0.5/1/4/8ms
1-50ms
0.5/1/4/8ms
PGOOD
125ms
RESET
1ms
Figure 5 - TYPICAL OUTPUT SEQUENCE DIAGRAM
V
PG0
V
PG1
VOUT0
VOUT1
Autosequence = 01b
V
PG0
V
PG1
VOUT1
VOUT0
Autosequence = 10b
V
PG0
V
PG1
VOUT0
VOUT1
Autosequence = 11b
EN0/1
0.5/1ms
0.5/1/4/8ms
1ms
NOTE: Sequence delay = 0ms, [03h] = 00
SUMMIT Microelectronics, Inc.
2147 2.4 2/23/2012
5
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