D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
NCP1000, NCP1001,
NCP1002
Integrated Off-
-Line
Switching Regulator
The NCP1000 through NCP1002 series of integrated switching
regulators, combine a fixed frequency PWM controller with an integrated
high voltage power switch circuit. This chip allows for simple design and
minimal parts count for very low cost applications which utilize an ac
input. This chip is designed to power a single ended topology, typically a
discontinuous mode flyback, with secondary side sensing.
The internal high voltage switch circuit and startup circuit can
function in continuous operation over a wide range of inputs, from
85 Vac to 265 Vac, and thus can be used in any existing power system in
the world. Though inexpensive, these devices include a number of
features such as undervoltage lockout, over-
-temperature protection,
bandgap reference and leading edge blanking that make them an
excellent value.
Features
http://onsemi.com
8
1
PDIP-
-8
P SUFFIX
CASE 626
Highly Integrated Solution
Operates Over Universal Input Voltage Range (85 Vac to 265 Vac)
On-
-board 700 V Power Switch Circuit
Minimal External Parts Required
Input Undervoltage Lockout with Hysteresis
Very Low Standby Current
No Minimum Load Requirement
Opto Fail-
-Safe Shutdown Circuit
These are Pb-
-Free Devices*
Pin: 1.
2.
3, 6--8
4.
5.
V
CC
Feedback Input
Ground
Startup
Power Switch Circuit
MARKING DIAGRAM
8
NCP100xP
AWL
YYWWG
1
x
A
WL
YY
WW
G
= Device Number 0, 1, or 2
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb--Free Package
Typical Applications
Cell Phone Chargers
Wall Adapters
On--board AC--DC Converters
V
CC
INTERNAL BIAS
UVLO &
OPTO FAIL--SAFE
FEEDBACK
INPUT
+
--
GND
PWM
COMPARATOR
STARTUP
CIRCUIT
POWER
SWITCH
CIRCUIT
STARTUP
ORDERING INFORMATION*
Device
NCP1000PG
NCP1001PG
NCP1002PG
Package
Shipping
Ipk Ron
Typ Max
(A) (Ω)
0.5
1.0
1.5
18
9
6
PDIP--8 50 Units/Rail
(Pb--Free)
PDIP--8 50 Units/Rail
(Pb--Free)
PDIP--8 50 Units/Rail
(Pb--Free)
PWM CONTROL
& POWER
SWITCH CIRCUIT
OSCILLATOR
*Consult factory for additional optocoupler fail--safe
latching, frequency, and current limit options.
Figure 1. Simplified Block Diagram
*For additional information on our Pb--Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2010
December, 2010 - Rev. 12
-
1
Publication Order Number:
NCP1000/D
NCP1000, NCP1001, NCP1002
FUNCTIONAL PIN DESCRIPTION
Pin
1
Function
V
CC
Description
Positive input supply voltage. This pin is connected to an external capacitor for energy storage.
The startup circuit sources current out of this pin to initially charge the capacitor. When the
voltage reaches the upper threshold limit of the undervoltage lockout circuit, the startup circuit
will turn off, and the power supply will begin operation. Power is then supplied to the chip via
this pin, by virtue of the auxiliary winding.
The error signal from the optocoupler is fed into this input. It is loaded with a 2.7 kΩ resistor
which converts the opto current into a voltage. There is a 7.0 kHz, single pole, low pass filter
between this pin and the error amp input. A 10 volt clamp is also connected to this pin to protect
the device from ESD damage or overvoltage conditions.
Ground reference pin for the circuit. These pins are part of the integrated circuit leadframe and
are an integral part of the heat flow path on the PDIP--8 package.
This pin is connected to the bulk DC input voltage supply. It feeds an internal current source that
initially charges up the V
CC
capacitor on power up.
The internal power switch circuit is connected between this pin and ground. This pin connects
directly to one end of the transformer primary winding.
2
Feedback Input
3, 6, 7, 8
4
5
Ground
Startup
Power Switch Circuit
MAXIMUM RATINGS
(Notes 1 and 2)
Rating
Power Switch Circuit (Pin 5)
Drain Voltage Range
Drain Current Peak During Transformer Saturation
Power Supply Voltage Range (Pin 1)
Feedback Input (Pin 2)
Voltage Range
Current
Thermal Resistance
P Suffix, Plastic Package Case 626
Junction--to--Lead
Junction--to--Air, 2.0 Oz. Printed Circuit Copper Clad
0.36 Sq. Inch
1.0 Sq. Inch
Operating Junction Temperature
Storage Temperature
Symbol
V
DS
V
clp
V
I(fb)
l
fb
Value
−0.3
to 700
2.0 I
lim
Max
−0.3
to 10
−0.3
to 10
100
Unit
V
A
V
V
mA
C/W
R
θJL
R
θJA
5.0
45
35
−40
to 125
−65
to +150
C
C
I
DS(pk)
T
J
T
stg
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Pins 1--3: Human Body Model 2000 V per MIL--STD--883, Method 3015.
Machine Model Method 200 V.
Pins 4 and 5 are the HV startup and the drain of the LDMOS device, rated only to the max rating of the part , or 700 V.
2. This device contains Latchup protection and exceeds
±200
mA per JEDEC Standard JESD78.
http://onsemi.com
2
NCP1000, NCP1001, NCP1002
ELECTRICAL CHARACTERISTICS
(V
CC
= 8.6 volts, pin 2 grounded, T
J
= 25C for typical values. For min/max values, T
J
is the
Characteristics
OSCILLATOR
Frequency (l
fb
= 1.1 mA) (Note 4) (Figure 7)
T
J
= 25C
T
J
= 0C to 125C
T
J
= --40C to 125C
PWM COMPARATOR
Feedback Input PWM Gain (T
J
= 25C) (l
fb
= 1.20 mA to 1.30 mA) (Figure 2)
Gain Temperature Coefficient (T
J
= --40C to T
J
= 125C) (Note 4)
PWM Duty Cycle (Pin 2)
Maximum (l
fb
= 0.8 mA)
Zero Duty Cycle Current
PWM Ramp
Peak
Valley
STARTUP CONTROL AND V
CC
LIMITER
Undervoltage Lockout (Figure 8)
V
CC
Clamp Voltage (I
CC
= 4.0 mA)
Startup Threshold (V
clp
Increasing)
Minimum Operating Voltage After Turn--On
Hysteresis
Startup Circuit, Pin 1 Output Current (Pin 4 = 50 V)
V
CC
= 0 V
V
CC
= 8.0 V
Minimum Startup Voltage (V
CC
= V
clp(on)
--0.2 V, I
start
= 0.5 mA)
Auto Restart (C
Pin 1
= 47
mF,
Pin 4 = 50 V) (Note 5)
Duty Cycle
Frequency
Startup Circuit Breakdown Voltage (I = 25
mA)
(Note 5)
Startup Circuit Leakage Current (Pin 4 = 700 V
DC
)
T
J
= 25C
T
J
= --40C to 125C
V
V
clp(on)
V
clp(min)
V
H
I
start
V
clp
8.3
8.2
7.2
--
2.0
1.5
--
4.0
--
700
--
--
8.55
8.5
7.5
1.0
3.4
2.6
14.7
5.0
1.2
--
20
30
8.9
8.8
8.0
--
mA
4.2
4.2
20
6.0
--
--
40
75
V
%
Hz
V
mA
A
v
ΔA
v
D
(max)
I
fb
--110
--
68
1.8
2.0
--
--
−136
0.2
72
--
--
4.1
2.7
--170
--
74
--
--
--
--
%/mA
(%/mA)/C
%
mA
mA
V
V
rpk
V
rvly
f
OSC
kHz
90
85
75
100
--
--
110
115
115
Symbol
Min
Typ
Max
Unit
operating junction temperature that applies.)
0C to 125C
--40C to 125C
V
start
D
rst
f
rst
V
BR(st)
I
leak
3. Maximum package power dissipation limits must be observed.
4. Tested junction temperature range for this device series: T
low =
--40C, T
high
= +125C
5. Guaranteed by design only.
http://onsemi.com
3
NCP1000, NCP1001, NCP1002
ELECTRICAL CHARACTERISTICS
Characteristics
POWER SWITCH CIRCUIT
Power Switch Circuit On--State Resistance
NCP1000 (I
D
= 50 mA)
T
J
= 25C
T
J
= 125C (Note 8)
NCP1001 (I
D
= 100 mA)
T
J
= 25C
T
J
= 125C (Note 8)
NCP1002 (I
D
= 150 mA)
T
J
= 25C
T
J
= 125C (Note 8)
Power Switch Circuit Breakdown Voltage
(I
D(off)
= 100
mA,
T
J
= 25C)
Power Switch Circuit Off--State Leakage Current (V
DS
= 650 V)
T
J
= 25C
T
J
= --40C to 125C
Switching Characteristics (V
DS
= 50 V, R
L
set for I
D
= 0.7 I
Iim
)
Turn--on Time (90% to 10%)
Turn--off Time (10% to 90%)
CURRENT LIMIT AND THERMAL PROTECTION
Current Limit Threshold (T
J
= 25C) (Note 9)
NCP1000
NCP1001
NCP1002
Current Limit, Peak Switch Current
NCP1000 (di/dt = 100 mA/ms)
NCP1001 (di/dt = 200 mA/ms)
NCP1002 (di/dt = 300 mA/ms)
Opto Fail--safe Protection (Figure 12)
T
J
= 25C
T
J
= 0C to 125C
Propagation Delay, Current Limit Threshold to Power Switch Circuit Output
(Leading Edge Blanking plus Current Limit Delay)
Thermal Protection (Note 6, 8)
Shutdown (Junction Temperature Increasing)
Hysteresis (Junction Temperature Decreasing)
TOTAL DEVICE
(Pin 1)
Power Supply Current After UVLO Turn--On
Power Switch Circuit Enabled
NCP1000
NCP1001
NCP1002
Power Switch Circuit Disabled
mA
I
CC1
--
--
--
0.6
1.2
1.4
1.6
1.0
1.6
1.8
2.0
1.25
I
lim
A
0.42
0.84
1.26
--
--
--
--
10
--
0.48
0.96
1.43
0.500
1.000
1.500
18
--
220
0.54
1.08
1.6
A
--
--
--
mA
25
35
--
ns
C
R
(on)
--
--
--
--
--
--
V
(BR)
I
(off)
700
13
24
7.0
14
4.0
8.0
--
18
36
9.0
18
6.0
12
--
V
mA
--
--
--
--
0.25
--
50
50
1.0
50
ns
t
on
t
off
--
--
Ω
Symbol
Min
Typ
Max
Unit
I
pk
I
Ofail
t
PLH
t
sd
t
H
125
--
140
30
--
--
I
CC2
6. Maximum package power dissipation limits must be observed.
7. Tested junction temperature range for this device series:
T
low
= --40C
T
high
= +125C
8. Guaranteed by design only.
9. Actual peak switch current is increased due to the propagation delay time and the di/dt (see Figure 16).
http://onsemi.com
4
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
