NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX28AEC
Rev. 4,
10/2018
i.MX28
i.MX28 Applications
Processors for
Automotive Products
Package Information
Plastic package
Case MAPBGA-289, 14 x 14 mm, 0.8 mm pitch
Ordering Information
See
Table on page 3
for ordering information.
1
Introduction
1
The i.MX28 family of processors offers feature
integration suited for automotive infotainment systems
and gateway products. These AEC-Q100 qualified
products are designed for cost-optimized multimedia
systems. The i.MX28 enables many of the features only
available in high-end systems, and at a price point
suitable for all vehicles. The core of the i.MX28 is
NXP’s fast, power-efficient implementation of the
ARM926EJ-S™ core, with speeds of up to 454 MHz.
Integrated power management, USB PHY, and LCD
display controller all contribute to overall system cost
savings.
The integrated power management unit (PMU) on the
i.MX28 is composed of a triple output DC-DC switching
converter and multiple linear regulators. These provide
power sequencing for the device and its I/O peripherals
such as memories and SD cards, as well as provide
battery charging capability for Li-Ion batteries.
The i.MX28 processor includes an additional 128-Kbyte
on-chip SRAM to make the device ideal for eliminating
NXP reserves the right to change the detail specifications as may be required
to permit improvements in the design of its products.
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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Device Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Ordering Information and Functional
Part Differences. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Special Signal Considerations. . . . . . . . . . . . . . . . 10
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 i.MX28 Device-Level Conditions . . . . . . . . . . . . . . 10
3.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . 17
3.3 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 I/O AC Timing and Parameters . . . . . . . . . . . . . . . 21
3.5 Module Timing and Electrical Parameters. . . . . . . 26
Package Information and Contact Assignments . . . . . . . 58
4.1 Case MAPBGA-289, 14 x 14 mm, 0.8 mm Pitch. . 58
4.2 Ground, Power, Sense, and Reference Contact
Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.3 Signal Contact Assignments . . . . . . . . . . . . . . . . . 60
4.4 i.MX281 Ball Map . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.5 i.MX285 Ball Map . . . . . . . . . . . . . . . . . . . . . . . . . 64
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Introduction
external RAM in applications with small footprint RTOS.
The i.MX28 supports connections to various types of external memories, such as mobile DDR, DDR2 and
LV-DDR2, SLC and MLC NAND Flash.
The i.MX28 can be connected to a variety of external devices such as high-speed USB2.0 OTG, CAN,
10/100 Ethernet, and SD/SDIO/MMC.
1.1
Device Features
The following lists the features of the i.MX28:
• ARM926EJ-S CPU running at 454 MHz:
— 16-Kbyte instruction cache and 32-Kbyte data cache
— Arm embedded trace macrocell (CoreSight™ ETM9™)
— Parallel JTAG interface
• 128 KBytes of integrated low-power on-chip SRAM
• 128 KBytes of integrated mask-programmable on-chip ROM
• 1280 bits of on-chip one-time-programmable (OCOTP) ROM
• 16-bit mobile DDR (mDDR) (1.8 V), DDR2 (1.8 V) and LV-DDR2 (1.5 V), up to 205 MHz DDR
clock frequency with voltage overdrive
• Support for up to eight NAND Flash memory devices with up to 20-bit BCH ECC
• Four synchronous serial ports (SSP) for SDIO/MMC/MS/SPI: SSP0, SSP1, SSP2, and SSP3. SSP0
and SSP1 can support three modes,1-bit, 4-bit, and 8-bit, whereas SSP2 and SSP3 can support only
1-bit and 4-bit modes.
• 10/100-Mbps Ethernet MAC compatible with IEEE Std 802.3™:
— Single 10/100 Ethernet with GMII/RMII
— Supporting IEEE Std 1588™-compatible hardware timestamp
— Supporting 50-MHz/25-MHz clock output for external Ethernet PHY
• Two 2.0B protocol-compatible Controller Area Network (CAN) interfaces
• One USB2.0 OTG device/host controller and PHY
• One USB2.0 host controller and PHY
• LCD controller, up to 24-bit RGB (DOTCK) modes and 24-bit system-mode
• Pixel-processing pipeline (PXP) supports full path from color-space conversion, scaling,
alpha-blending to rotation without intermediate memory access.
• SPDIF transmitter
• Dual serial audio interface (SAIF) to support full-duplex transmit and receive operations; each
SAIF supports three stereo pairs
• Five application Universal Asynchronous Receiver-Transmitters (UARTs), up to 3.25 Mbps with
hardware flow control
• One debug UART operating at up to 115 Kb/s using programmed I/O
• Two I
2
C master/slave interfaces, up to 400 kbps
i.MX28 Applications Processors for Automotive Products, Rev. 4,
10/2018
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NXP Semiconductors
Introduction
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Four 32-bit timers and a rotary decoder
Eight Pulse Width Modulators (PWMs)
Real-time clock (RTC)
GPIO with interrupt capability
Power Management Unit (PMU) supports a triple output DC-DC switching converter, multiple
linear regulators, battery charger, and detector.
16-channel Low-Resolution A/D Converter (LRADC). There are 16 physical channels but they can
only be mapped to 8 virtual channels at a time.
Single channel High Speed A/D Converter (HSADC), up to 2 Msps data rate
4/5-wire touchscreen controller
Up to 8X8 keypad matrix with button-detect circuit
Security features:
— Read-only unique ID for Digital Rights Management (DRM) algorithms
— Secure boot using 128-bit AES hardware decryption
— SHA-1 and SHA256 hashing hardware
— High assurance boot (HAB4)
Offered in 289-pin Ball Grid Array (BGA)
1.2
Ordering Information and Functional Part Differences
Table 1.
Ordering Information
Part Number
MCIMX281AVM4B
MCIMX281AVM4C
MCIMX285AVM4B
MCIMX285AVM4C
Projected Temperature Range (°C)
–40 to +85
–40 to +85
–40 to +85
–40 to +85
Package
14 x 14 mm, 0.8 mm pitch, MAPBGA-289
14 x 14 mm, 0.8 mm pitch, MAPBGA-289
14 x 14 mm, 0.8 mm pitch, MAPBGA-289
14 x 14 mm, 0.8 mm pitch, MAPBGA-289
Table 1
provides the ordering information for the i.MX28.
Table 2
provides the functional differences between the i.MX281 and i.MX285.
Table 2. i.MX28 Functional Differences
Function
LCD Interface
Touch Screen
i.MX281
—
—
i.MX285
Yes
Yes
i.MX28 Applications Processors for Automotive Products, Rev. 4,
10/2018
NXP Semiconductors
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Introduction
1.3
Block Diagram
Figure 1
shows the simplified interface block diagram.
Figure 1. i.MX28 Simplified Interface Block Diagram
i.MX28 Applications Processors for Automotive Products, Rev. 4,
10/2018
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NXP Semiconductors
Features
2
Features
Table 3. i.MX28 Functions
Function
BGA289
Yes
Table 3
shows the device functions.
External Memory Interface (EMI)
(1.5 V LV-DDR2, 1.8 V DDR2, 1.8 V LP-DDR1)
General-Purpose Media Interface (GPMI):
• NAND data width
• Number of external NANDs supported
Pulse Width Modulator (PWM)
Application UART (AUART): Interfaces supported
Synchronous Serial Port (SSP): Supported through dedicated pins
I
2
C
SPDIF
SAIF
FlexCAN
LCD interface
High-speed ADC
LRADC (touchscreen, keypad...)
Ethernet MAC
Universal Serial Bus (USB)
8-bit
4 dedicated / 8 with muxing
5 dedicated / 8 with muxing
4 dedicated / 5 with muxing
3 dedicated / 4 with muxing
1 dedicated / 2 with muxing
1
2
2
24 bits
Yes
Yes
Up to 2 MACs
2
i.MX28 Applications Processors for Automotive Products, Rev. 4,
10/2018
NXP Semiconductors
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