CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
3.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
4. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
V
SUPPLY
=
±15V
HA-2520-2
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage
25
Full
Offset Voltage Drift
Bias Current
Full
25
Full
Offset Current
25
Full
Input Resistance (Note 5)
Common Mode Range
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
(Notes 6, 9)
Common Mode Rejection Ratio
(Note 7)
Gain Bandwidth (Notes 5, 8)
Minimum Stable Gain
OUTPUT CHARACTERISTICS
Output Voltage Swing (Note 6)
Output Current (Note 9)
Full Power Bandwidth
(Notes 9, 14)
TRANSIENT RESPONSE
(A
V
= +3)
Rise Time (Notes 6, 10, 11, 13)
Overshoot (Notes 6, 10, 11, 13)
25
25
-
-
25
25
50
40
-
-
25
25
50
50
-
-
25
25
50
50
ns
%
Full
25
25
±10.0
±10
1.5
±12.
0
±20
2.0
-
-
-
±10.0
±10
1.2
±12.
0
±20
2.0
-
-
-
±10.0
±10
1.2
±12.
0
±20
2.0
-
-
-
V
mA
MHz
25
Full
Full
25
25
10
7.5
80
10
3
15
-
90
20
-
-
-
-
-
-
7.5
5
74
10
3
15
-
90
20
-
-
--
-
-
-
7.5
5
74
10
3
15
-
90
20
-
-
-
-
-
-
kV/V
kV/V
dB
MHz
V/V
25
Full
-
-
-
-
-
-
-
50
±10.0
4
-
20
100
-
10
-
100
-
8
11
-
200
400
25
50
-
-
-
-
-
-
-
-
-
40
±10.0
5
-
25
125
-
20
-
100
-
10
14
-
250
500
50
100
-
-
-
-
-
-
-
-
-
40
±10.0
5
-
30
125
-
20
-
100
-
10
14
-
250
500
50
100
-
-
mV
mV
µV/°C
nA
nA
nA
nA
MΩ
V
TEMP
(°C)
HA-2522-2
HA-2525-5
MAX
(Note 16)
UNITS
Electrical Specifications
MIN
MAX
MIN
MAX
MIN
(Note 16) TYP (Note 16) (Note 16) TYP (Note 16) (Note 16) TYP
2
FN2894.9
February 16, 2009
HA-2520, HA-2522, HA-2525
Electrical Specifications
V
SUPPLY
=
±15V
(Continued)
HA-2520-2
PARAMETER
Slew Rate (Notes 6, 10, 13, 15)
Settling Time (Notes 6, 10, 13, 15)
POWER SUPPLY CHARACTERISTICS
Supply Current
Power Supply Rejection Ratio (Note 11)
25
Full
-
80
4
90
6
-
-
74
4
90
6
-
-
74
4
90
6
-
mA
dB
TEMP
(°C)
25
25
HA-2522-2
HA-2525-5
MAX
(Note 16)
-
-
UNITS
V/µs
µs
MIN
MAX
MIN
MAX
MIN
(Note 16) TYP (Note 16) (Note 16) TYP (Note 16) (Note 16) TYP
±100
-
±12
0
0.20
-
-
±80
-
±12
0
0.20
-
-
±80
-
±12
0
0.20
NOTES:
5. This parameter value is based on design calculations.
6. R
L
= 2kΩ.
7. V
CM
= ±10V.
8. A
V
> 10.
9. V
O
= ±10.0V.
10. C
L
= 50pF.
11. V
O
= ±200mV.
12. DV = ±5.0V.
13. See Transient Response Test Circuits and Waveforms.
Slew Rate
-
14. Full Power Bandwidth guaranteed based on slew rate measurement using: FPBW
= ----------------------------
.
2πV PEAK
15. V
OUT
=
±5V.
16. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
3
FN2894.9
February 16, 2009
HA-2520, HA-2522, HA-2525
Test Circuits and Waveforms
+1.67V
INPUT
-1.67V
+5V
75%
OUTPUT
-5V
Δt
25%
ΔV
SLEW
RATE
=
ΔV/Δt
ERROR BAND
±10mV
FROM
FINAL VALUE
±67mV
INPUT
0V
OVERSHOOT
±200mV
90%
OUTPUT
10%
0V
RISE TIME
SETTLING
TIME
NOTE: Measured on both positive and negative transitions from 0V
to +200mV and 0V to -200mV at the output.
FIGURE 1. SLEW RATE AND SETTLING TIME
FIGURE 2. TRANSIENT RESPONSE
V+
1F
INPUT
667.2Ω
2
7
0.001
µ
F
6
4
1
µ
F
100pF
OUTPUT
3 +
-
IN
+
OUT
1667Ω
V-
0.001
µ
F
2001Ω
-
5pF
1333Ω
50pF
2N4416
D
S
G
4999.9Ω
SETTLING TIME
TEST POINT
CR
1
CR
2
667Ω
2000Ω
NOTES:
17. A
V
= -3.
18. Feedback and summing resistor ratios should be 0.1% matched.
19. Clipping diodes CR
1
and CR
2
are optional. HP5082-2810
recommended.
FIGURE 3. SLEW RATE AND TRANSIENT RESPONSE
V+
FIGURE 4. SETTLING TIME TEST CIRCUIT
20kΩ
IN
BAL.
OUT
COMP
C
C
V-
NOTE: Tested offset adjustment range is |V
OS
+ 1mV| minimum referred to output. Typical ranges are ±20mV with R
T
= 20kΩ.
FIGURE 5. SUGGESTED V
OS
ADJUSTMENT AND COMPENSATION HOOK-UP
4
FN2894.9
February 16, 2009
HA-2520, HA-2522, HA-2525
Schematic Diagram
OFFSET
-
PIN 1
BAL 1
200
R
2AA
R
21
Q
29
R
11
R
13
Q
28
R
16
Q
27
+INPUT
R
15
Q
1A
Q
2A
Q
17
R
1A
Q
18
Q
31
Q
26
Q
25
R
6A
Q
22
R
6B
Q
19
Q
20
Q
21A
Q
21B
Q
5A
R
3A
Q
2B
Q
1B
Q
11B
Q
4A
Q
4B
Q
16
440
1.8k
R
2A
OFFSET+
BAL 2
200
R
2BB
R
10
440
1.8k
R
2B
Q
3B
Q
15
Q
23
R
9
Q
8
D
138
R
17
50
Q
12B
R
18
30
D
13A
Q
6
Q
9
Q
5B
R
3B
Q
10
D
14
R
19
R
10
V-
Q
11A
Q
12A
R
12
COMP
V+
Q
30
Q
3A
C
1
1pF
OUTPUT
R
1B
Q
24
Q
7
-INPUT
Typical Application
Inverting Unity Gain Circuit
Figure 6 shows a Compensation Circuit for an inverting unity
gain amplifier. The circuit was tested for functionality with
supply voltages from ±4V to ±15V, and the performance as
tested was: Slew Rate
≈
120V/µs; Bandwidth
≈
10MHz; and
Settling Time (0.1%)
≈
500ns. Figure 7 illustrates the amplifier’s
frequency response, and it is important to note that capacitance
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