HC77D Series 2.5 V
HCSL Clock Oscillators
January 2011
• Pletronics’ HC77D Series is a quartz crystal
controlled precision square wave generator with a
HCSL output.
• The package is designed for high density surface
mount designs.
• Low cost mass produced oscillator.
• Tape and Reel or cut tape packaging is available.
•
•
•
•
13 MHz to 220 MHz
5 x 7 mm LCC Ceramic Package
Enable/Disable Function on pad 1
Disable function includes low standby power
mode
• Fundamental and 3
rd
Overtone Crystals used
• Low Jitter
Pletronics Inc. certifies this device is in accordance with the
RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.16 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020D.1
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
V
CC
Supply Voltage
Vi
Vo
Input Voltage
Output Voltage
Unit
-0.5V to +5.0V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
Thermal Characteristics
The maximum die or junction temperature is 155
o
C
The thermal resistance junction to board is 30 to 50
o
C/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necessarily include testing of all parameters.
Copyright © 2011, Pletronics Inc.
HC77D Series 2.5 V
HCSL Clock Oscillators
January 2011
Part Number:
HC77
45
D
E
W
-125.0M
-XX
Packaging code or blank
T250
= 250 per Tape and Reel
T500
= 500 per Tape and Reel
T1K
= 1000 per Tape and Reel
Frequency in MHz
Supply Voltage V
CC
W
= 2.5V _ 10%
+
Optional Enhanced OTR
Blank
= Temp. range -10 to +70
o
C
C
= Temp. range -20 to +70
o
C
E
= Temp. range -40 to +85
o
C
Series Model
Frequency Stability
45
= + 50 ppm
_
44
= + 25 ppm
_
20
= + 20 ppm
_
Series Model
Part Marking and Legend:
PLE HC77
FF.FFFM
C
YMDXX
PLE
= Pletronics
FF.FFF
M = Frequency in MHz
YMD
= Date of Manufacture (year and week, or year-month-day)
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc. are
not identified from the marking. External packaging labels and packing list will correctly identify the
ordered Pletronics part number.
Codes for Date Code YMD
Code
0
1
2
3
4
Code
A
B
C
D
E
F
G
H
J
K
L
M
Year
2010 2011 2012 2013 2014
Month
JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC
Code
Day
Code
Day
1
1
H
17
2
2
J
18
3
3
K
19
4
4
L
20
5
5
M
21
6
6
N
22
7
7
P
23
8
8
R
24
9
9
T
25
A
10
U
26
B
11
V
27
C
12
W
28
D
13
X
29
E
14
Y
30
F
15
Z
31
G
16
www.pletronics.com
425-776-1880
2
HC77D Series 2.5 V
HCSL Clock Oscillators
January 2011
Electrical Specification for 2.50V _10% over the specified temperature range
+
Item
Frequency Accuracy “45"
“44"
“20"
Power Supply Sensitivity
Output Waveform
Output High Level
Output Low Level
Output Symmetry
Jitter
660
-
45
-
-
Output T
RISE
and T
FALL
V
CC
Supply Current (I
CC
)
-
-
740
0
50
0.2
-
0.3
18
19
20
-
-
-
-
-
-
-
-
-
-
-
-
Min
-50
-25
-20
-1
Typ
0
0
0
-
Max
50
25
20
1
HCSL
850
150
55
0.6
2.8
0.5
28
29
30
-
0.6
-
10
2
200
2
+70
+70
+85
+125
20
mV
mV
%
pS RMS
pS RMS
nS
mA
See load circuit
See load circuit
at 50% point of output See load circuit
12 KHz to 20 MHz from the output frequency
10 Hz to 1 MHz from the output frequency
Vth is 20% and 80% of
output waveform
<130 MHz
>= 130 MHz to 170 MHz
>170 MHz
See load circuit
See load circuit
ppm
For V
CC
change of +10%
_
Unit
ppm
Condition
For all supply voltages, load changes, aging for
1 year, shock, vibration and temperatures
Enable/Disable Internal
Pull-up
V disable
V enable
Output leakage
Enable time
Disable time
Start up time
Operating Temperature
Range
200
-
2.40
-10
-
-
-
-10
- 20
- 40
Kohm
volts
volts
uA
mS
nS
mS
o
o
o
o
to V
CC
, measured with Pad 1 = 0.0 volts
Referenced to pad 3
Referenced to pad 3
Pad 1 low, device disabled
Time for output to reach specified frequency
Time for output to reach a high Z state
Time for output to reach specified frequency
Standard Temperature Range
Extended Temperature Range
Extended Temperature Range
“C” Option
“E” Option
C
C
C
C
Storage Temperature
Standby Current I
CC
-55
-
uA
Pad 1 low, device disabled
Specifications with Pad 1 E/D open circuit unless stated otherwise
www.pletronics.com
425-776-1880
3
HC77D Series 2.5 V
HCSL Clock Oscillators
January 2011
Typical Phase-Noise Response
0
-20
-40
dBc/Hz
-60
-80
-100
-120
-140
-160
10
1,000
100,000
10,000,000
Frequency (Hz)
Test and Load Circuit
Test Waveform
Symmetry
Vhigh
Vhigh
80%
80%
50%
50%
20%
20%
Vlow
Vlow
Trise
Trise
Symmetry
Out
Out
Tfall
Out*
Out*
Showing Out Measurement only
Tfall
Showing Out Measurement only
www.pletronics.com
425-776-1880
4
HC77D Series 2.5 V
HCSL Clock Oscillators
January 2011
Reliability
: Environmental Compliance
Parameter
Mechanical Shock
Vibration
Solderability
Thermal Shock
Condition
MIL-STD-883 Method 2002, Condition B
MIL-STD-883 Method 2007, Condition A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Human Body Model
Charged Device Model
Minimum Voltage
1500
1000
Conditions
MIL-STD-883 Method 3115
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
www.pletronics.com
425-776-1880
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
