November 2003
rev 1.0
Features
•
•
•
•
•
•
•
•
Two on chip PLLs.
Generates an EMI optimized clocking signal
at output.
Non Spread spectrum mode available
Input Frequency Range 2MHz– 200Mhz in
Non Spread mode
Input Frequency Range 6Mhz – 80Mhz in
Spread mode.
Output Frequency Range 4Mhz – 140Mhz.
Four frequency outputs; two per PLL.
Programmable spread range and type of
modulation ( center or down) and type of
profile.
•
•
•
Power down feature is incorporated.
Both the PLL have reference frequency
output.
Supply voltage range 3.3 V (± 0.3)
Software is available for configuring all the
parameters of the Chip, through
I2C .
FOUT2_CLK1
PLL1_REF_D2
7
8
FOUT1_CLK1
VDD_FOUT2
VDD_FOUT1
4
5
6
X1OUT
VDDA/DIGITAL
2
3
X1IN
1
AS80M2516A
Pin Configuration
16
15
14
13
12
11
10
9
REF1OUT
GND
SCL
SDA
FOUT1_CLK2
FOUT2_CLK2
REF2OUT
POWER DOWN
•
Product Description
The AS80M2516A is dual phase lock loop clock
chip. The AS80M2516A is a versatile spread
spectrum frequency modulator design specifically
for a wide range of clock frequencies.
The AS80M2516A reduces electromagnetic
interference (EMI) at clock source. The
AS80M2516A allows significant system cost
savings by reducing the number of circuit board
layers and shielding that are required to pass EMI
regulations.
The AS80M2516A is I2C configurable. All the
functional parameters of the AS80M2516A can be
configured from external I2C master unit through
I2C bus.
The AS80M2516A modulates the output of PLL in
order to spread the bandwidth of a
synthesized clock , there by decreasing the peak
amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical narrow band signal produced by oscillator
and most clock generators. Lowering EMI by
increasing a signal's bandwidth is called spread
spectrum clock generation.
Alliance Semiconductor
2575, Augustine Drive
•
Santa Clara, CA
•
Tel: 408.855.4900
•
Fax: 408.855.4999
•
www.alsc.com
Notice: The information in this document is subject to change without notice.
November 2003
rev 1.0
AS80M2516A
Block Diagram
X1IN
X1OUT
Crystal
Oscillator
1 / R PLL1
FOUT1_CLK1
PLL1
MODULATION
1/N
Feedback
Counter
Out Div
DIV
FOUT1EN
CLKGENEN1
FOUT1_CLK2
I
2
C
SDA
Out Div
FOUT2EN
CLKGENEN1
SCL
I
N
T
E
R
F
A
C
E
1 / R PLL2
PLL2
REF1 OUT
DIV 1 2
REFOUT1EN
CLKGENEN1
PLL1_REF_D2
FOUT2_CLK1
Out Div
DIV
FOUT1EN
CLKGENEN2
FOUT2_CLK2
1/N
Feedback
Counter
Out Div
FOUT2EN
CLKGENEN2
REFOUT2
REFOUT2EN
CLKGENEN2
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 15
`
November 2003
rev 1.0
AS80M2516A
Pin Description
Pin
Type
IN
OUT
PWR
PWR
PWR
OUT
OUT
IN
IN
OUT
OUT
OUT
IN/OUT
IN
PWR
OUT
Connection to Crystal-1
Connection to Crystal-1
Power supply to Analog and Digital blocks except the Output Buffers
Variable Output Voltage Control for FOUT2 . The minimum voltage is
1.8V.
Variable Output Voltage Control for FOUT1 . The minimum voltage is
1.8V.
Tristatable Clock Output-1 of Clock Generator-1
Tristatable Clock Output-2 of Clock Generator-1
Set High to divide the REF_IN(X1IN) by 2
Powers the entire chip down
Buffered and Divide by 2 Output of X1IN
Tristatable Clock Output-2 of Clock Generator-2
Tristatable Clock Output-1 of Clock Generator-2
Serial Data I/O for I2C
Serial Clock Input for I2C
Ground to entire chip
Buffered Output of X1IN
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
X1IN
X1OUT
VDDA/DIGITAL
VDD_FOUT2
VDD_FOUT1
FOUT1_CLK1
FOUT2_CLK1
PLL1_REF_D2
POWERDOWN
REF2OUT
FOUT2_CLK2
FOUT1_CLK2
SDA
SCL
GND
REF1OUT
Description
Note:- All the Pin types IN have CMOS pull-up resistors.
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
3 of 15
November 2003
rev 1.0
Absolute Maximum Ratings
AS80M2516A
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These conditions represent a stress rating only, and functional operation of the device at these or any other
conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating
conditions for extended conditions may affect device performance, functionality and reliability.
PARAMETER
Supply Voltage, dc (Vss = ground)
SYMBOL
V
DD
MIN
V
SS
-0.5
MAX
7
UNITS
V
Input Voltage, dc
V
I
V
SS
-0.5
V
DD
+0.5
V
Output Voltage, dc
Input Clamp Current, dc (V
I
< 0 or V
I
>V
DD
)
Output Clamp Current, dc (V
I
< 0 or V
I
>V
DD
)
Storage Temperature Range (non
condensing)
Ambient Temperature Range, Under
Bias
Junction Temperature
V
O
V
SS
-0.5
V
DD
+0.5
V
I
IK
-50
50
mA
I
OK
-50
50
mA
T
S
-65
150
°C
T
A
-55
125
°C
T
J
150
°C
Lead Temperature (soldering, 10s)
Input Static Discharge Voltage
Protection (MIL – STD 883E, Method
3015.7)
260
°C
2
kV
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting in loss of functionality or performance may occur if this
device is subjected to a high-energy electrostatic discharge.
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
4 of 15
November 2003
rev 1.0
AS80M2516A
Operating Conditions
PARAMETER
Supply Voltage
Ambient Operating
Temperature Range
Crystal Resonator
Frequency
Serial Data Transfer
Rate
Output Driver Load
Capacitance
SYMBOL
V
DD
T
A
F
XIN
CONDITIONS/DESCRIPTION
3.3V
MIN
3
0
2
TYP
3.3
MAX
3.6
70
200
100
15
UNITS
V
°C
MHz
kb/s
pF
±
10%
Standard mode
10
C
L
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
5 of 15
Microchip MCU
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