电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

Y0798106R000Q0W

产品描述RESISTOR, METAL FOIL, 0.1 W, 0.02 %, 2.5 ppm, 106 ohm, SURFACE MOUNT, 2010, CHIP, ROHS COMPLIANT
产品类别无源元件    电阻器   
文件大小2MB,共7页
制造商Vishay(威世)
官网地址http://www.vishay.com
标准
下载文档 详细参数 全文预览

Y0798106R000Q0W概述

RESISTOR, METAL FOIL, 0.1 W, 0.02 %, 2.5 ppm, 106 ohm, SURFACE MOUNT, 2010, CHIP, ROHS COMPLIANT

Y0798106R000Q0W规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Vishay(威世)
包装说明SMT, 2010
Reach Compliance Codeunknown
其他特性ULTRA HIGH PRECISION, NON INDUCTIVE
构造Rectangular
JESD-609代码e4
安装特点SURFACE MOUNT
端子数量2
最高工作温度240 °C
最低工作温度-55 °C
封装高度0.5 mm
封装长度5.08 mm
封装形式SMT
封装宽度2.54 mm
包装方法WAFFLE PACK
额定功率耗散 (P)0.85 W
额定温度70 °C
电阻106 Ω
电阻器类型FIXED RESISTOR
尺寸代码2010
表面贴装YES
技术METAL FOIL
温度系数3 ppm/°C
端子面层Gold (Au)
端子形状ONE SURFACE
容差0.02%

文档预览

下载PDF文档
HTHG* (Z1-Foil)
Vishay Foil Resistors
Ultra High Precision Z1-Foil Technology Gold Wire Bondable Chip
Resistor for Hybrid Circuits for High Temperature Applications
up to +240°C, Long Term Stability of 0.05%,TCR to ± 1ppm/°C
FEATURES
Temperature coefficient of resistance (TCR):
±1 ppm/°C typical (- 55 °C to + 125 °C, + 25 °C ref.)
±2.5 ppm/°C typical (- 55 °C to + 220 °C, + 25 °C
ref.)
Resistance range: 5 to 125 k(for higher
or lower values, please contact VFR's application
engineering department)
Resistance tolerance: to ± 0.02 %
Connection method: gold wire bonding
Working power: to 150mW at + 220°C
Long term stability: to ± 0.05 % at + 240°C for 2000h, no
power
Load life stability: to 0.05% at + 220°C for 2000h at
working power
Vishay Foil resistors are not restricted to standard values;
specific "as required" values can be supplied at no extra
cost or delivery (e.g. 1K2345 vs. 1K)
Thermal stabilization time < 1 s (nominal value achieved
within 10 ppm of steady state value)
Electrostatic discharge (ESD) at least to 25 kV
Non inductive, non capacitive design
Rise time: 1 ns effectively no ringing
Current noise: 0.010 µV (RMS)/Volt of applied voltage
(< - 40 dB)
Voltage coefficient: < 0.1 ppm/V
Non inductive: < 0.08 µH
Non hot spot design
Terminal finish available: gold plated (lead (Pb)-free alloy)
Prototype quantities available in just 5 working days
or sooner. For more information, please contact
foil@vishaypg.com
INTRODUCTION
Vishay Foil Resistors (VFR) introduces a new line of Ultra
Precision Bulk Metal
®
Z1-Foil technology: hybrid chip
resistors, connected using gold wire bonding. The HTHG
series features two different layouts of chip designs
according to the sizes (see figure 3 and table 4). These new
types of hybrid chips were especially designed for high
temperature applications up to + 240°C
(1)
(working power: to
150mW at + 220°C), and include gold plated terminals.
The HTHG series is available in any value within the
specified resistance range. VFR's application engineering
department is available to advise and make
recommendations.
For non-standard technical requirements and special
applications, please contact
foil@vishaypg.com.
Percent of Rated Power
TABLE 1 - TOLERANCE AND TCR VS.
RESISTANCE VALUE
(1)(2)
(- 55 °C to + 220 °C, + 25 °C Ref.)
RESISTANCE
VALUE
()
100to 125K
50to < 100
25to < 50
10to < 25
5to 10
(1)
(2)
FIGURE 1 - POWER DERATING CURVE
-55°C
100
75
50
25
0
-75
+70°C
TOLERANCE
(%)
± 0.02
± 0.05
± 0.1
± 0.25
± 0.5
TCR Typical
(ppm/°C)
± 2.5
-50
-25
0
+25
+50
+240
+75 +100 +125 +150 +175 +200 +225 +250
Ambient Temperature (°C)
Notes
Performances obtained with ceramic PCB.
For tighter performances or non-standard values up to 150 k,
please contact VFR's application engineering department by
sending an e-mail to the address in the footer below.
* HTHG was previously named HTH
Document Number: 63221
Revision: 13-Dec-12
For any questions, contact:
foil@vishaypg.com
www.vishayfoilresistors.com
1
数字电路与逻辑设计学习指导
《数字电路与逻辑设计学习指导》给出了各章节的基本学习要求、知识要点;总结了数字电路的主要分析和设计方法;对重点和难点问题进行了分析和例题详解;鉴于数字电路设计的灵活性,对可有多种解 ......
arui1999 下载中心专版
[转帖]ARM 集成开发工具介绍
希望对刚开始学嵌入式,需要用到ADS的朋友有所帮助 本文转引自 飞凌嵌入式 技术论坛 http://www.witech.com.cn/ ARM ADS 全称为 ARM Developer Suite 。是 ARM 公司推出的新一代 ARM ......
taoweiwen ARM技术
An FPGA Design Security Solution Using a Secure Memory Device
Introduction FPGA designs are vulnerable to design theft because configuration bitstreams can be easily captured and copied. FPGAs are more vulnerable to cloning of the entire d ......
xiaoxin1 FPGA/CPLD
大家在遇到全局变量时都会去保证原子性吗?
从理论上来,所有的全局变量,大到一个结构体,小到一个bit,在操作时都应该使用某种方法,保证操作的原子性。但是在现实当中,看一下code,就会发现大量的全局变量就在毫无防范的使用。在嵌入式 ......
eestudent 嵌入式系统
怎样学好C语言,献给迷茫中的新手。(转自其它网站)
自己学习C 语言也快半年了,从最初的一无所知,茫然,没有方向感,无从下手,到现在的熟练应用,确实经历了不少曲折,走过一些弯路,可能有人会说,信息时代,资料那里都有。那可以,你去网上找 ......
chen8710 单片机
2000元用蚁群算法编程序,高手来
利用蚁群算法编一程序,对输入的数据进行约简,输入数据样例如下 决策表 病理症状诊断结果 是否头痛 体温 是否感冒 病人1 是 正常 否 病人2 是 高 是 病人3 是 很高 是 病人4 否 正常 否 ......
gdgaodeyong 嵌入式系统

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2416  935  715  2800  2546  5  1  42  38  19 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved