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NCS6415
Bus−Controlled Video
Matrix Switch
Description
The main function of the NCS6415 is to switch 8 video input
sources to the 6 outputs.
Each output can be switched to only one of the inputs, whereas any
single input may be connected to several outputs.
All switching possibilities are controlled through the I
2
C bus.
Features
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MARKING DIAGRAMS*
20
•
Cascadable with another NCS6415 (Internal Address can be changed
•
•
•
•
•
•
•
•
•
by Pin 7 Voltage)
8 Inputs (CVBS, RGB, Chroma, ...)
6 Outputs with Low Impedance Driver
Possibility of Chroma Signal for each Input by Switching off the
Clamp with an External Resistor Bridge
Bus Controlled
6.5 dB Gain between any Input and Output
−45 dB Crosstalk at 5 MHz
Compatible with TEA6415C
Full ESD Protection
These are Pb−Free Devices
20
1
NCS6415
AWLYYWWG
SO−20 WB
DW SUFFIX
CASE 751D
A
WL
YY
WW
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
INPUT1
1
DATA1
2
INPUT2
3
CLOCK
4
INPUT3
5
INPUT4
6
PROG
7
INPUT5
8
V
CC
9
INPUT6
10
20
INPUT8
19
GND
18
OUTPUT6
17
OUTPUT5
16
OUTPUT4
15
OUTPUT3
14
OUTPUT2
13
OUTPUT1
12
GND
11
INPUT7
ORDERING INFORMATION
Device
NCS6415DWG
NCS6415DWR2G
Package
SO−20
(Pb−Free)
Shipping
†
38 Units / Rail
SO−20
1000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2006
1
September, 2006 − Rev. 0
Publication Order Number:
NCS6415/D
NCS6415
OUTPUT6
OUTPUT4
OUTPUT2
OUTPUT5
OUTPUT3
OUTPUT1
GND
18
17
16
15
14
13
12
INPUT1
1
INPUT2
3
INPUT3
5
INPUT4
6
INPUT5
8
INPUT6
10
INPUT7
11
INPUT8
20
Bus Decoder
2
DATA
7
PROG
4
CLOCK
9
V
CC
19
GND
Figure 1. Block Diagram
The main function of the NCS6415 is to switch 8 video
input sources to the 6 outputs.
Each output can be switched to only one of the inputs,
whereas any single input may be connected to several
outputs. The lowest level of each signal is aligned on each
input (bottom of sync pulse for CVBS or Black Level for
RGB signals).
The nominal gain between any input and output is 6 dB.
For Chroma signals, the alignment is switched off by
forcing, with an external 5‘ VDC resistor bridge on the input.
Each input can be used as a normal input or as a Chroma
input (with external resistor bridge). All the switching
possibilities are changed through the I
2
C bus.
The switches configuration is defined by words of 16 bits:
one word of 16 bits for each output channel.
So, 6 words of 16 bits are necessary to determine the
starting configuration upon power−on (power supply: 0 to
10 V). But a new configuration needs only the words of the
changed output channels. Driving a 75
W
load requires an
external transistor.
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2
NCS6415
Table 1. ATTRIBUTES
Characteristics
ESD
Moisture Sensitivity (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
Human Body Model
Machine Model
Value
4 kV
400 V
Level 3
UL 94 V−0 @ 0.125 in.
1. For additional information, see Application Note AND8003/D
Table 2. MAXIMUM RATINGS
Parameter
Power Supply Voltage
Operating Temperature Range
Storage Temperature Range
Thermal Resistance, Junction−to−Air
SO−20
Symbol
V
CC
T
A
T
stg
q
JA
Rating
12
0 to +70
−60 to +150
30 to 35
Unit
V
°C
°C
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. DC & AC Characteristics
(T
A
= 25°C, V
CC
= 10 V, R
L
= 10 kW, C
L
= 3 pF)
Symbol
V
CC
I
CC
INPUTS
Signal Amplitude (CVBS signal) (Note 2)
Input Current (per output connected, V
IN
= 5 V
DC
)
DC Level
DC Level Shift (0°C to 70°C)
R
IN
C
IN
OUTPUTS
Dynamic (V
IN
= 2.5 V
PP
)
Output Impedance (Note 2)
A
V
BW
Gain (Note 2)
Bandwidth (Note 2)
−1 dB Attenuation
−3 dB Attenuation
0.1 dB Gain Flatness (Note 2)
Crosstalk
DC Level
I
2
C BUS INPUT: DATA, CLOCK AND PROG
Threshold Voltage
2. Guaranteed by design and/or characterization.
1.5
2
3
V
f = 3.58 MHz
f = 5 MHz
2.4
6
7
6
−48
−45
2.75
3.1
5
25
6.5
15
20
MHz
dB
V
50
7
V
PP
W
dB
MHz
Input Resistance
Input Capacitance
3.3
1.5
1
3.6
5
1
2
2
3
3.9
100
V
PP
mA
V
mV
MW
pF
Supply Voltage
Power Supply Current (No Load)
Parameter
Min
8
20
Typ
10
30
Max
11
40
Unit
V
mA
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3
NCS6415
Table 4. I
2
C Bus Characteristics
Symbol
SCL
V
IL
V
IH
I
LI
f
SCL
t
R
t
F
C
I
SDA
V
IL
V
IH
I
LI
C
I
t
R
t
F
V
OL
t
F
C
L
TIMING
t
LOW
t
HIGH
t
SU,DAT
t
HD,DAT
t
SU,STO
t
BUF
t
HD,STA
t
SU,STA
Clock Low Period (Note 4)
Clock High Period (Note 4)
Data Setup Time (Note 4)
Data Hold Time (Note 4)
Setup Time from Clock High to Stop (Note 4)
Start Setup Time following a Stop (Note 4)
Start Hold Time (Note 4)
Start Setup Time following Clock Low to High Transition
(Note 4)
4.7
4.0
250
0
4.0
4.7
4.0
4.7
340
ms
ms
ns
ns
ms
ms
ms
ms
Low Level Input Voltage
High Level Input Voltage
Input Leakage Current
Input Capacitance (Note 3)
Input Rise Time (Note 3)
Input Fall Time (Note 3)
Low Level Output Voltage
Output Fall Time (Note 3)
Load Capacitance
1.5 V to 3 V
3 V to 1.5 V
I
OL
= 3 mA
3V to 1.5 V
V
I
= 0 to V
CC
−0.3
3.0
−10
+1.5
V
CC
+0.5
+10
10
1000
300
0.4
250
400
V
V
mA
pF
ns
ns
V
ns
pF
Low Level Input Voltage
High Level Input Voltage
Input Leakage Current
Clock Frequency (Note 3)
Input Rise Time (Note 3)
Input Fall Time (Note 3)
Input Capacitance (Note 3)
1.5 V to 3 V
3 V to 1.5 V
V
I
= 0 to V
CC
−0.3
3.0
−10
0
+1.5
V
CC
+0.5
+10
100
1000
300
10
V
V
mA
kHz
ns
ns
pF
Parameter
Test Conditions
Min
Max
Unit
3. Guaranteed by design and/or characterization.
4. Functionality guaranteed by design and/or characterization.
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