电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

HCTS299D/SAMPLE

产品描述HCT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP20
产品类别逻辑    逻辑   
文件大小291KB,共12页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 选型对比 全文预览

HCTS299D/SAMPLE概述

HCT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP20

HCTS299D/SAMPLE规格参数

参数名称属性值
厂商名称Renesas(瑞萨电子)
零件包装代码DIP
包装说明DIP,
针数20
Reach Compliance Codeunknown
计数方向BIDIRECTIONAL
系列HCT
JESD-30 代码R-CDIP-T20
逻辑集成电路类型PARALLEL IN PARALLEL OUT
位数8
功能数量1
端子数量20
输出特性3-STATE
输出极性TRUE
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
传播延迟(tpd)34 ns
认证状态Not Qualified
座面最大高度5.08 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
触发器类型POSITIVE EDGE
宽度7.62 mm

HCTS299D/SAMPLE文档预览

TM
HCTS299MS
Radiation Hardened
8-Bit Universal Shift Register; Three-State
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
MR
1
2
3
4
5
6
7
8
9
20 VCC
19 S1
18 DS7
17 Q7
16 I/O7
15 I/O5
14 I/O3
13 I/O1
12 CP
11 DS0
August 1995
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
-Bus Driver Outputs: 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
Input Current Levels Ii
5µA at VOL, VOH
GND 10
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability. The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (MR) is an
asynchronous active low input.
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
MR
GND
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
DS0
Ordering Information
PART NUMBER
HCTS299DMSR
HCTS299KMSR
HCTS299D/Sample
HCTS299K/Sample
HCTS299HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
DB NA
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
624
Spec Number
518640
FN3069.1
HCTS299MS
Functional Block Diagram
S1
20
19
DS7
18
STANDARD
OUTPUT
Q7
17
BUS LINE OUTPUTS
I/O7
16
I/O5
15
I/O3
14
I/O1
13
CP
12
DS0
11
VCC
OE
OE
OE
OE
OE
OE
OE
OE
D7
CL
CL
Q
D
R
Q7
S1
S1
S0
Q
D
D5
CL
R
Q5
CL
Q
D
D3
CL
R
Q3
CL
Q
D
D1
CL
R
Q1
MODE
SELECT
LOGIC
CL
CL
CL
S0
OE
Q6
Q4
Q2
Q0
OE
CL
CL
D6
R
D
Q
CL
CL
D4
R
D
Q
CL
CL
D2
R
D
Q
CL
CL
D0
R
D
Q
OE
OE
OE
OE
OE
OE
OE
OE
GND
1
S0
2
OE1
3
OE2
4
I/O6
5
I/O4
6
I/O2
7
I/O0
8
9
10
BUS LINE OUTPUTS
Q0
MR
STANDARD
OUTPUT
Spec Number
625
518640
HCTS299MS
TRUTH TABLE
Register Operating Modes
INPUTS
FUNCTION
Reset (Clear)
Shift Right
MR
L
H
H
Shift Left
H
H
Hold (Do Nothing)
Parallel Load
H
H
H
CP
X
S0
X
h
h
l
l
l
h
h
S1
X
l
l
h
h
l
h
h
DS0
X
l
h
X
X
X
X
X
DS7
X
X
X
l
h
X
X
X
I/On
X
X
X
X
X
X
l
h
Q0
L
L
H
q1
q1
q0
L
H
REGISTER OUTPUTS
Q1
L
q0
q0
q2
q2
q1
L
H
...
...
...
...
...
...
...
...
...
Q6
L
q5
q5
q7
q7
q6
L
H
Q7
L
q6
Q6
L
H
q7
L
H
TRUTH TABLE
Three-State I/O Port Operating Mode
INPUTS
FUNCTION
Read Register
OE1
L
L
L
L
Load Register
Disable I/O
X
H
X
OE2
L
L
L
L
X
X
H
S0
L
L
X
X
H
X
X
S1
X
X
L
L
H
X
X
Qn (REGISTER)
L
H
L
H
Qn = I/On
X
X
INPUTS/OUTPUTS
I/O0 . . . I/O7
L
H
L
H
I/On = Inputs
Z
Z
H = HighVoltage Level
L = Low Voltage Level
X = Immaterial
Z = Output in High Impedance State
h = Input Voltage High One Setup Time Prior Clock Transition
l = Input voltage Low One Setup Time Prior Clock Transition
= Low-to-High Clock Transition
qn = Lower Case Letter Indicates the State of the Referenced Output One Setup Time Prior Clock Transition
Spec Number
626
518640
Specifications HCTS299MS
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output.
. . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
θ
JA
θ
JC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
72
o
C/W
24
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 107
o
C/W
28
o
C/W
o
Maximum Package Power Dissipation at +125 C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide
heat sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . . 500ns Max
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
2, 3
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
7.2
6.0
-7.2
-6.0
-
MAX
40
750
-
-
-
-
0.1
UNITS
µA
µA
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
VCC
-0.1
-
-
-
-
-
-
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
V
1
2, 3
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
±0.5
±5.0
±1
±50
-
µA
µA
µA
µA
-
Three-State Output
Leakage Current
IOZ
Applied Voltage = 0V or
VCC, VCC = 5.5V
1
2, 3
Noise Immunity
Functional Test
NOTES:
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
1. All voltages referenced to device GND.
2. For functional tests, VO
4.0V is recognized as a logic “1”, and VO
0.5V is recognized as a logic “0”.
Spec Number
627
518640
Specifications HCTS299MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
CLK to Q0, Q7
TPHL,
TPLH
VCC = 4.5V
9
10, 11
MR to Output
TPHL
VCC = 4.5V
9
10, 11
OEn to Output
TPZH
VCC = 4.5V
9
10, 11
TPHZ
9
10, 11
TPZL
9
10, 11
TPLZ
9
10, 11
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
2
2
2
2
2
2
2
2
2
2
MAX
28
32
30
34
32
36
23
25
25
27
30
34
30
34
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
CLK to I/On
SYMBOL
TPHL,
TPLH
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, f = 1MHz
NOTES
1
1
Input Capacitance
CIN
VCC = 5.0V, f = 1MHz
1
1
Output Transition
Time
TTHL,
TTLH
VCC = 4.5V
1
1
Max Operating
Frequency
FMAX
VCC = 4.5V
1
1
Setup Time DS0,
DS7, I/On to CLK
TSU
VCC = 4.5V
1
1
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
-
-
-
-
-
-
-
-
20
30
MAX
147
171
10
10
15
22
25
16
-
-
UNITS
pF
pF
pF
pF
ns
ns
MHz
MHz
ns
ns
Spec Number
628
518640

HCTS299D/SAMPLE相似产品对比

HCTS299D/SAMPLE HCTS299K/SAMPLE
描述 HCT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP20 HCT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP20
厂商名称 Renesas(瑞萨电子) Renesas(瑞萨电子)
零件包装代码 DIP DFP
包装说明 DIP, DFP,
针数 20 20
Reach Compliance Code unknown unknown
计数方向 BIDIRECTIONAL BIDIRECTIONAL
系列 HCT HCT
JESD-30 代码 R-CDIP-T20 R-CDFP-F20
逻辑集成电路类型 PARALLEL IN PARALLEL OUT PARALLEL IN PARALLEL OUT
位数 8 8
功能数量 1 1
端子数量 20 20
输出特性 3-STATE 3-STATE
输出极性 TRUE TRUE
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DIP DFP
封装形状 RECTANGULAR RECTANGULAR
封装形式 IN-LINE FLATPACK
传播延迟(tpd) 34 ns 34 ns
认证状态 Not Qualified Not Qualified
座面最大高度 5.08 mm 2.92 mm
最大供电电压 (Vsup) 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V
表面贴装 NO YES
技术 CMOS CMOS
端子形式 THROUGH-HOLE FLAT
端子节距 2.54 mm 1.27 mm
端子位置 DUAL DUAL
触发器类型 POSITIVE EDGE POSITIVE EDGE
宽度 7.62 mm 6.92 mm
【平头哥RVB2601创意应用开发】 第六篇 建立TCP客户端
wifi的使用不太顺利,源代码的结构很乱,使用代码的跳转功能,发现socket的函数在sal和socket的头文件之间跳来跳去,成了一个循环,找不到具体在哪里实现的,放弃了。 后来参考多位坛友的 ......
manhuami2007 玄铁RISC-V活动专区
2006年吉林省全国大学生电子设计竞赛试题
本帖最后由 paulhyde 于 2014-9-15 09:47 编辑 大学生电子设计竞赛参赛注意事项 (1)2006年9月19日8:00大学生电子设计竞赛竞赛开始,每支参赛队限定在下列题中任选一题;填写《登记表》,由 ......
呱呱 电子竞赛
CH554评测:PWM测试
本帖最后由 liyiui 于 2017-10-22 11:59 编辑 CH554的开发板还算比较大,有3个USB口326303 当CH554通过USB线与电脑相连时,会自动安装串口,USB口驱动程序,安装成功后,重新连接电脑会有 ......
liyiui 单片机
TI 信号链与电源专场答疑系列直播 - 传感器专场 有奖直播进行中!
TI 信号链与电源专场答疑系列直播 - 传感器专场 有奖直播进行中! >>点击进入直播 直播时间: 2022年7月1日(今天)上午10:00-11:30 直播主题: TI 信号链与电源专场 ......
EEWORLD社区 TI技术论坛
LPC1788电子相册
各位坛友好,本人刚学完51,现在手里有个lpc1788的板子和4.3寸的屏。当我把图片转成C文件,能显示图片,但C文件有1Mb多。所以如果我要显示多张照片,那么我的内存不够,看了论坛大家读SD卡的照 ......
joy6130 NXP MCU
更新ESP32固件的方法
本帖最后由 dcexpert 于 2018-7-30 22:21 编辑 更新ESP32有多种方法: 使用官方的FLASH_DOWNLOAD_TOOLS 使用esptool.py 使用DFRobot的uPyCraft ]使用FLASH_DOWNLOAD_TOOLS时,按照下 ......
dcexpert MicroPython开源版块

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1015  1937  1813  57  22  6  16  8  26  51 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved