HY51V(S)17403HG/HGL
4M x 4Bit EDO DRAM
PRELIMINARY
DESCRIPTION
The HY51V(S)17403HG/HGL is the new generation dynamic RAM organized 4,194,304 words x 4bit.
HY51V(S)17403HG/HGL has realized higher density, higher performance and various functions by utiliz-
ing advanced CMOS process technology. The HY51V(S)17403HG/HGL offers Extended Data Out Page-
Mode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)17403HG/HGL to be
packaged in standard 300mil 24(26)pin SOJ and 24(26) pin TSOP-II. The package size provides high sys-
tem bit densities and is compatible with widely available automated testing and insertion equipment.
System oriented features include single power supply 3.3V +/- 0.3V tolerance, direct interfacing capability
with high performance logic families such as Schottky TTL.
FEATURES
•
•
•
•
•
Extended Data Out Mode capability
Read-modify-write capability
Multi-bit parallel test capability
TTL(3.3V) compatible inputs and outputs
/RAS only, CAS-before-/RAS, Hidden and self
refresh(L-version) capability
Fast access time and cycle time
Part No
HY51V(S)17403HG/HGL-5
HY51V(S)17403HG/HGL-6
HY51V(S)17403HG/HGL-7
tRAC
50ns
60ns
70ns
•
•
•
•
JEDEC standard pinout
24(26)pin plastic SOJ / 24(26)pin TSOP-II
Single power supply of 3.3V +/- 0.3V
Battery back up operation(L-version)
•
tCAC
13ns
15ns
18ns
tRC
84ns
104ns
124ns
tHPC
20ns
25ns
30ns
•
Power dissipation
50ns
Active
Standby
432mW
60ns
369mW
70ns
360mW
•
Refresh cycle
Part No
HY51V17403HG
HY51V17403HGL
Ref
2K
2K
Normal
32ms
128ms
L-part
7.2mW(CMOS level Max)
0.36mW (L-version : Max)
ORDERING INFORMATION
Part Number
HY51V(S)17403HGJ/HG(L)J-5
HY51V(S)17403HGJ/HG(L)J-6
HY51V(S)17403HGJ/HG(L)J-7
HY51V(S)17403HGT/HG(L)T-5
HY51V(S)17403HGT/HG(L)T-6
HY51V(S)17403HGT/HG(L)T-7
(S) : Self refresh,
(L) : Low power
Access Time
50ns
60ns
70ns
50ns
60ns
70ns
Package
300mil 24(26)pin SOJ
300mil 24(26)pin TSOP-II
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.0.1/Apr.01
HY51V(S)17403HG/HGL
PIN CONFIGURATION
V
CC
I/O1
I/O2
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
26
25
24
23
22
21
V
SS
I/O4
I/O3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
V
CC
I/O1
I/O2
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
26
25
24
23
22
21
V
SS
I/O4
I/O3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
8
9
10
11
12
13
19
18
17
16
15
14
8
9
10
11
12
13
19
18
17
16
15
14
24(26) Pin Plastic SOJ
24(26) Pin Plastic TSOP-II
PIN DESCRIPTION
Pin
/RAS
/CAS
/WE
/OE
A0-A11
A0-A11
I/O 1- I/O 4
Vcc
Vss
NC
Function
Row Address Strobe
Column Address Strobe
Write Enable
Output Enable
Address Inputs
Refresh Address Inputs
Data Input / Output
Power (3.3V)
Ground
No connection
Rev.0.1/Apr.01
2
HY51V(S)17403HG/HGL
ABSOLUTE MAXIMUM RATINGS
Parameter
Ambient Temperature
Storage Temperature
Voltage on Any Pin relative to V
ss
Voltage on V
cc
relative to V
ss
Short Circuit Output Current
Power Dissipation
Symbol
T
A
T
STG
V
T
V
cc
I
OUT
P
T
Rating
0 ~ 70
-55 ~ 125
-0.5 ~ Vcc + 0.5
(Max 4.6V)
-0.5 ~ 4.6
50
1
Unit
o
o
C
C
V
V
mA
W
Recommended DC OPERATING CONDITIONS
(TA=0 to 70
o
C)
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
cc
V
IH
V
IL
Min
3.0
2.0
-0.3
Typ.
3.3
-
-
Max
3.6
V
cc
+ 0.3
0.8
Unit
V
V
V
Note
Note : All voltages are referenced to Vss
Rev.0.1/Apr.01
3
HY51V(S)17403HG/HGL
DC CHARACTERISTICS
(Vcc = 3.3V +/- 10%, TA=0 to 70°C)
Symbol
VOH
Output Level
Output Level voltage(Iout= -2mA)
Output Level
Output Level voltage(Iout=2mA)
50ns
ICC1
Parameter
Min
2.4
Max
Vcc
Unit
V
Note
VOL
0
-
-
-
0.4
100
90
80
V
Operating current
Average power supply operating current
( /RAS, /CAS Cycling : tRC = tRC min)
Standby current (TTL interface)
Power supply standby current
(/RAS, /CAS=VIH, Dout = High-Z)
/RAS only refresh current
Average power supply current
/RAS only refresh mode
(tRC= tRC min)
60ns
70ns
mA
1, 2
I
CC2
-
2
mA
50ns
60ns
70ns
50ns
-
-
-
-
-
-
-
-
100
90
80
90
80
75
1
100
100
90
80
300
uA
4
mA
mA
uA
4
mA
1, 3
mA
2
ICC3
ICC4
Fast page mode current
Average power supply current
Fast page mode (tPC=tPC min)
CMOS interface ( /RAS, /CAS >= Vcc-0.2V, Dout = High-Z)
60ns
70ns
ICC5
Standby current ( L-version)
50ns
ICC6
-
-
-
-
/CAS-before-/RAS refresh current (tRC=tRC min)
60ns
70ns
ICC7
Battery back up operating current (standby with CBR refresh)
(tRC=31.3us, tRAS<=0.3us, Dout=High-Z)
Standby current
( /RAS = VIH, /CAS = VIL, Dout=Enable)
Self refresh current
(/RAS, /CAS <=0.2V, Dout=High-Z, CMOS interface)
Input leakage current, Any input (0V<= Vin<=4.6V)
Output leakage current, (Dout is disabled, 0V<= Vout<=4.6V)
ICC8
-
5
uA
1
ICC9
II(L)
IO(L)
-
-10
-10
200
10
10
uA
uA
uA
4
Note :
1. Icc depends on output load condition when the device is selected, Icc(max) is specified at the output open condition
2. Address can be changed once or less while /RAS=VIL
3. Address can be changed once or less while /CAS=VIH
4. /CAS = L (<=0.2) while /RAS=L (<=0.2)
5. L-Version
Rev.0.1/Apr.01
4
HY51V(S)17403HG/HGL
CAPACITANCE
(Vcc=3.3V +/-10%, TA=25°C)
Parameter
Input capacitance (Address)
Input capacitance (Clocks)
Output capacitance (Data-in, Data-out)
Symbol
CI1
CI2
CI/O
Min.
-
-
-
Max
5
7
7
Unit
pF
pF
pF
Note
1
1
1, 2
Note : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. /CAS = V
IH
to disable D
out
AC CHARACTERISTICS
Test Condition
•
•
(Vcc=3.3V +/-10%, TA=0~70C, Note 1, 2, 18)
•
Input rise and fall times = 2ns
Input levels : V
IL
=0V, V
IH
=3V
Input timing reference level : V
IL
/V
IH
= 0.8/2.0V
•
•
Output timing reference level :
V
OL
/V
OH
=0.8/0.2V
Output load : 1 TTL gate + C
L
(100pF)
( including scope and jig )
Read, Write, Read-modify-Write and Refresh Cycle
-50
Parameter
Random read or write cycle time
/RAS precharge time
/CAS precharge time
/RAS pulse width
/CAS pulse width
Row address set-up time
Row address hold time
Column address set-up time
Column address hold time
/RAS to /CAS delay time
/RAS to Column address delay time
/RAS hold time
/CAS hold time
/CAS to /RAS precharge time
Symbol
Min
t
RC
t
RP
t
CP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
84
30
8
50
8
0
8
0
8
12
10
10
35
5
Max
-
-
-
10,000
10,000
-
-
-
-
37
25
-
-
-
Min
104
40
10
60
10
0
10
0
10
14
12
13
40
5
Max
-
-
-
10,000
10,000
-
-
-
-
45
30
-
-
-
Min
124
50
13
70
13
0
10
0
13
14
12
13
45
5
Max
-
-
-
10,000
10,000
-
-
-
-
52
35
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
4
-60
-70
Unit
Note
Rev.0.1/Apr.01
5
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