Rev. 1.2
_00
Temperature Switch with Latch
S-8130AA
The S-8130AA is a temperature switch with a latch function
having a built-in semiconductor temperature sensor with the
accuracy of ±2.5°C. The output signal is inverted when the
temperature is detected, and latched until a reset signal input or a
detection of the power voltage lowering.
Low voltage operation down to 2.2 V is possible and the current
consumption is low, 15
µA
(typ.), due to CMOS configuration.
The S-8130AA consists of a temperature sensor having the
temperature coefficient of
−13
mV/°C, a reference voltage source,
a comparator, voltage detection circuit, and noise suppression
circuit all of which is enclosed in a small 8-Pin MSOP package.
Available temperature range is between
−40
to
+100
°C and wide
application in temperature control can be achieved since the output
linearity is excellent compared to other sensors including
thermistor.
Features
•
•
•
•
•
•
•
•
•
Detection temperature :
+60
to
+95°C,
5°C step
Detection accuracy :
±2.5°C
V
SS
grounded temperature voltage output
Low voltage operation : V
DD
(min.)=2.2 V
Low current consumption : 15
µA
typ. (+25°C)
Output logic level is fixed by the latch after temperature detection
Noise suppression at temperature detection
Small plastic package : 8-Pin MSOP
8-Pin MSOP (PKG drawing code : FN008-A)
■
Applications
•
Game console
•
Electronic devices
Package
Seiko Instruments Inc.
1
Temparature Switch with Latch
S-8130AA
Block diagram
S-8130AAXFN-XXX-T2 (Fixed detection temperature)
VDD
VOUT
RT
Vref
Reference
voltage source
Rev. 1.2
_00
Temparature
Sensor
Vref
+
-
CD1
D
Q
DET
D-F/F
CK R
RESET
Voltage detector
with delay circuit
CD2
VSS
Figure 1
Selection Guide
Product name
S - 8130 A A X F N - X X X - T 2
Taping direction (Direction of IC in tape)
Abbreviated Code
Option code
Option list
•
Detection temperature T
DET
can be selected 5°C step in the range between 60 and 95°C.
•
DET output should be high-active or low-active.
•
Release voltage V
RET
can be selected 0.1 V step in the range between 2.2 and 3.4 V.
•
RESET pin should be selected from
″PuII-up″
or
″Nch
Open Drain″.
Product name
T
DET
DET output
V
RET
2.4 V
2.9 V
RESET
Pull-up
Pull-up
S-8130AAAFN-MAA-T2
80°C
High-active
S-8130AACFN-MAE-T2
86°C
High-active
When other combination is required, please ask our sales office.
2
Seiko Instruments Inc.
Rev. 1.2
_00
Pin configuration
8-Pin MSOP
Top view
VDD
DET
CD2
CD1
1
2
3
4
8
7
6
5
VOUT
RT
RESET
Temperature Switch with Latch
S-8130AA
VSS
Figure 2
Pin Description
Pin No.
1
2
3
4
5
6
Pin Name
VDD
DET
CD2
CD1
VSS
RESET
Function
Positive power supply pin
Output pin for detection at the defined
temperature
Capacitor connection pin for delay time
setting in voltage detection
Capacitor connection pin for noise
filtering time
Ground pin
Input/Output pin for reset
Low -active
Input/Output
CMOS output : Output logic is
selectable
Input/Output
Input/Output
Input : CMOS
Output : N channel open drain
(Pull-up resistance is optional)
Input
7
8
RT
VOUT
Reference voltage input pin (short-
circuited to VOUT pin internally)
Output pin for reference voltage from the Output
internal comparator
Absolute maximum ratings
(Ta = 25
°C
unless otherwise specified)
Parameter
Supply voltage (V
SS
=0.0 V)
Pin voltage
Operating temperature
Storage temperature
Caution
Symbol
V
DD
V
OUT
, V
RT
,
V
RESET
, V
DET
, V
CD1
, V
CD2
T
opr
T
stg
Ratings
V
SS
+12
V
SS
−0.3
to V
DD
+0.3
−40
to
+100
−55
to
+125
Unit
V
V
°C
°C
The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
Recommended values for external parts
Parameters
CD1 capacitance
CD2 capacitance
Symbol
C
D1
C
D2
Value
4.7
4.7
Unit
nF
nF
Seiko Instruments Inc.
3
Temparature Switch with Latch
S-8130AA
DC Electrical Characteristics
Parameters
Supply voltage
Detection
temperature
Output current 1
Input voltage
Symbol
V
DD
T
D
I
DETH
I
DETL
V
ONH
V
ONL
Pull-up resistance
Release voltage for
voltage detector
Hysteresis width for
voltage detector
Output current for
voltage detector
Temperature
coefficient for voltage
detector
Operating current
R
OL
V
R
V
HYS
I
RSTL
∆
V
RET
∆
Ta
•
V
RET
Rev. 1.2
_00
Conditions
V
DD
=3 V
Applied to
DET pin
(Ta=25°C, V
SS
=0 V unless otherwise specified)
Min.
Typ.
Max.
Unit
2.2
T
DET
−2.5
2
0.5
0.8
×
V
DD
V
SS
T
DET
4
1
100
V
RET
V
RET
×
0.05
1
±100
15
10.0
T
DET
+2.5
V
DD
0.2
×
V
DD
300
V
RET
×
1.02
30
V
°C
mA
mA
V
V
kΩ
V
V
mA
ppm/
°C
µA
V
DET
=2.2 V
V
DET
=0.4 V
Applied to
RESET
pin
Applied to
RESET
pin
V
IN
=0 V, V
DD
=3.0 V
V
DD
=3.0 V,
V
RESET
=0.5 V
Applied to
RESET
pin
Ta=
−40
to 100°C
V
DD
=3.3 V
30
V
RET
×
0.98
0.5
I
DD
AC Electrical Characteristics
Parameters
Noise filtering time
Delay time for
voltage detector
Symbol
T
noise
T
delay
Conditions
C
D1
=4.7 nF, V
DD
=3 V
C
D2
=4.7 nF, V
DD
=3 V
(Ta=25°C unless otherwise specified)
Min.
Typ.
Max.
Unit
10
30
50
ms
10
30
50
ms
Definition of the symbols used in the voltage detection circuit
V
DD
Release voltage (V
RET
)
Detection voltage
Minimum operating voltage
V
SS
B
Hysteresis width
(V
HYS
)
A
RESETpin voltage (V
DD
)
V
SS
T
delay
Figure 3
4
Seiko Instruments Inc.
Rev. 1.2
_00
Description of Operation
1. Basic operation
Temperature Switch with Latch
S-8130AA
S-8130AA series is a temperature switch which detects a certain temperature and sends a signal to an
external device. Combination of the parameters such as detection temperature, release voltage can be
selected.
In the following DET output is supposed to be high-active.
When the power voltage is turned on, the DET pin voltage goes to “L” since the flip-flop circuit in the
detection circuit is cleared by the delayed voltage detection circuit. Temperature detection then starts and the
DET pin is held “L” as long as the temperature is lower than the detection temperature. The temperature goes
high and exceeds the detection temperature for longer than the time defined by the capacitor connected to the
CD1 pin, then the DET pin goes to “H”. Once the over-temperature is detected and the DET pin goes to “H”, the
state is held by the flip-flop circuit. In order to release the state the
RESET
pin voltage should be set to “L” by
the external signal or the power voltage should be set under the detection voltage of the built-in detector to reset
the internal circuit.
Using the internal reference voltage and built-in temperature sensor, the accuracy of ±2.5°C in the detection
temperature is achieved.
Noise filtering circuit
The noise filtering circuit prevents malfunction of the temperature switch caused by noise.
The noise filtering circuit starts charging of the capacitor connected to the CD1 pin when the output of the
internal comparator enters active state due to an external noise or a rapid change in the power voltage. In
the normal operation the flip-flop circuit is set when the capacitor is charged to a certain voltage. But in the
noise triggered operation the comparator output goes back to inactive state and the CD1 pin voltage is held
low since the charging of the capacitor is insufficient. As a result the DET pin is held low and malfunction
does not occur.
Noise filtering time, T
noise
, is determined by the time constant consisting of internal constant current and the
capacitance C
D1
, and calculated by the following equation.
T
noise
(ms)=Noise fitering time coefficient
×
C
D1
(nF)
Noise fitering time coefficient (25°C): Typ. 6.4
2. Voltage detection circuit with delay
The delay circuit of the voltage detector provides a delayed output signal to the
RESET
pin when the power
voltage V
DD
rises and exceeds the release voltage V
R
. On the other hand no delay occurs when the power
voltage V
DD
goes lower than the detection voltage, V
R
-V
HYS
.
The delay time, T
delay
, is determined by the time constant consisting of internal constant current and the
capacitance C
D2
, and calculated by the following equation.
T
delay
(ms)=Delay coefficient
×
C
D2
(nF)
Delay coefficient (25°C): Min. 4.3, Typ. 6.4, Max. 8.5
•
When the board wiring is made, attention should be paid that no current flows into or flows out of the
CD2 pin to have correct delay time since the impedance of the CD2 pin is high.
Capacitance of the external capacitor C
D2
has no limitation as long as its leak current is negligible
compared to the internal constant current. Error in delay time occurs If the capacitor has leak current.
When the leak current is larger than the internal constant current, no release takes place.
•
Seiko Instruments Inc.
5
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