INTEGRATED CIRCUITS
SA5214
Postamplifier with link status indicator
Product specification
Replaces datasheet NE/SA5214 of 1995 Apr 26
IC19 Data Handbook
1998 Oct 07
Philips
Semiconductors
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5214
DESCRIPTION
The SA5214 is a 75MHz postamplifier system designed to accept
low level high-speed signals. These signals are converted into a
TTL level at the output. The SA5214 can be DC coupled with the
previous transimpedance stage using SA5210, SA5211 or SA5212
transimpedance amplifiers. This “system on a chip” features an
auto-zeroed first stage with noise shaping, a symmetrical limiting
second stage, and a matched rise/fall time TTL output buffer. The
system is user-configurable to provide noise filtering, adjustable
input thresholds and hysteresis. The threshold capability allows the
user to maximize signal-to-noise ratio, insuring a low Bit Error Rate
(BER). An Auto-Zero loop can be used to minimize the number of
external coupling capacitors to one. A signal absent flag indicates
when signals are below threshold. Additionally, the low signal
condition forces the overall TTL output to a logical Low level. User
interaction with this “jamming” system is available. The SA5214 is
packaged in a standard 20-pin surface-mount package and typically
consumes 42mA from a standard 5V supply. The SA5214 is
designed as a companion to the SA5211/5212 transimpedance
amplifiers. These differential preamplifiers may be directly coupled
to the post-amplifier inputs. The SA5212/5214 or SA5211/5214
combinations convert nanoamps of photodetector current into
standard digital TTL levels.
PIN CONFIGURATION
D
1
Package
LED
1
20 IN
1B
19 IN
1A
18 C
AZP
17 C
AZN
16 OUT
1B
15 IN
2B
14 OUT
1A
13 IN
2A
12 R
HYST
11 R
PKDET
C
PKDET
2
THRESH 3
GND
A
4
FLAG
5
JAM 6
V
CCD
7
V
CCA
8
GND
D
9
V
OUT
10
TOP VIEW
NOTE:
1. SOL – Released in large SO package only.
SD00349
Figure 1. Pin Configuration
FEATURES
APPLICATIONS
•
Fiber optics
•
Communication links in Industrial and/or Telecom environment
with high EMI/RFI
•
Local Area Networks (LAN)
•
Metropolitan Area Networks (MAN)
•
Synchronous Optical Networks (SONET)
•
RF limiter
•
Postamp for the SA5211/5212 preamplifier family
•
Wideband operation: typical 75MHz (100MBaud NRZ)
•
Interstage filtering/equalization possible
•
Single 5V supply
•
Low signal flag
•
Low signal output disable
•
Link status threshold and hysteresis programmable
•
LED driver (normally ON with above threshold signal)
•
Fully differential for excellent PSRR
•
Auto-zero loop for DC offset cancellation
•
2kV ElectroStatic Discharge (ESD) protection
ORDERING INFORMATION
DESCRIPTION
20-Pin Plastic Small Outline Large (SOL) Package
TEMPERATURE RANGE
-40°C to +85°C
ORDER CODE
SA5214D
DWG #
SOT163-1
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CCA
V
CCD
T
A
T
J
T
STG
P
D
V
IJ
Power supply
Power supply
Operating ambient temperature range
Operating junction temperature range
Storage temperature range
Power dissipation
Jam input voltage
PARAMETER
RATING
+6
+6
-40 to +85
-55 to +150
-65 to +150
300
-0.5 to 5.5
UNIT
V
V
°C
°C
°C
mW
V
1998 Oct 07
2
853-1657 20142
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5214
PIN DESCRIPTIONS
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
LED
C
PKDET
THRESH
GND
A
FLAG
JAM
V
CCD
V
CCA
GND
D
V
OUT
R
PKDET
R
HYST
IN
2A
OUT
1A
IN
2B
OUT
1B
C
AZN
C
AZP
IN
1A
IN
1B
DESCRIPTION
Output for the LED driver. Open collector output transistor with 125Ω series limiting resistor. An above threshold signal
turns this transistor ON.
Capacitor for the peak detector. The value of this capacitor determines the detector response time to the signal,
supplementing the internal 10pF capacitor.
Peak detector threshold resistor. The value of this resistor determines the threshold level of the peak detector.
Device analog ground pin.
Peak detector digital output. When this output is LOW, there is data present above the threshold. This pin is normally
connected to the JAM pin and has a TTL fanout of two.
Input to inhibit data flow. Sending the pin HIGH forces TTL DATA OUT ON, Pin 10, LOW. This pin is normally connected
to the FLAG pin and is TTL-compatible.
Power supply pin for the digital portion of the chip.
Power supply pin for the analog portion of the chip.
Device digital ground pin.
TTL output pin with a fanout of five.
Peak detector current resistor. The value of this resistor determines the amount of discharge current available to the
peak detector capacitor, C
PKDET
.
Peak detector hysteresis resistor. The value of this resistor determines the amount of hysteresis in the peak detector.
Non-inverting input to amplifier A2.
Non-inverting output of amplifier A1.
Inverting input to amplifier A2.
Inverting output of amplifier A1.
Auto-Zero capacitor pin (Negative terminal). The value of this capacitor determines the low-end frequency response of
the preamp A1.
Auto-Zero capacitor pin (Positive terminal). The value of this capacitor determines the low-end frequency response of the
preamp A1.
Non-inverting input of the preamp A1.
Inverting input of the preamp A1.
BLOCK DIAGRAM
OUT
1A
OUT
1B
IN
2B
IN
2A
14 16 15
IN
1B
IN
1A
C
AZP
C
AZN
20
19
18
17
PEAK DETECT
11
A4
5
FLAG
A6
OUTPUT DISABLE 6
JAM
A1
13
V
CCD
7
GATED AMP
A2
V
CCA
8
OUTPUT BUFFER
A8
10
V
OUT
R
PKDET
A3
A5
A7
1
LED
LED DRIVER
HYSTERESIS
4
GND
A
9
GND
D
3
THRESH
2
C
PKDET
12
R
HYST
SD00350
Figure 2. Block Diagram
1998 Oct 07
3
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5214
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CCA
V
CCD
T
A
T
J
P
D
Supply voltage
Power supply
Ambient temperature range
Operating junction temperature range
Power dissipation
PARAMETER
RATING
4.75 to 5.25
4.75 to 5.25
-40 to +85
-40 to +110
250
UNIT
V
V
°C
°C
mW
DC ELECTRICAL CHARACTERISTICS
Min and Max limits apply over the operating temperature range at V
CCA
=V
CCD
=+5.0V unless otherwise specified. Typical data applies at
V
CCA
=V
CCD
=+5.0V and T
A
=25°C.
SYMBOL
I
CCA
I
CCD
V
I1
V
O1
A
V1
A1
PSRR
A1
CMRR
V
I2
V
OH
V
OL
I
OH
I
OL
I
OS
V
THRESH
V
RPKDET
V
RHYST
V
IHJ
V
ILJ
I
IHJ
I
ILJ
V
OHF
V
OLF
I
OHF
I
OLF
I
SCF
I
LEDH
PARAMETER
Analog supply current
Digital supply current
(TTL, Flag, LED)
A1 input bias voltage
(+/- inputs)
A1 output bias voltage
(+/- outputs)
A1 DC gain
(without Auto-Zero)
A1 PSRR (v
CCA
, V
CCD
)
A1 CMRR
A2 input bias voltage
(+/- inputs)
High-level TTL output voltage
Low-level TTL output voltage
High-level TTL output current
Low-level TTL output current
Short-circuit TTL output current
Threshold bias voltage
RPKDET
RHYST bias voltage
High-level jam input voltage
Low-level jam input voltage
High-level jam input current
Low-level jam input current
High-level flag output voltage
Low-level flag output voltage
High-level flag output current
Low-level flag output current
Short-circuit flag output current
LED ON maximum sink current
V
IJ
=2.7V
V
IJ
=0.4V
I
OH
=-80µA
I
OL
=3.2mA
V
OUT
=2.4V
V
OUT
=0.4V
V
OUT
=0.0V
V
LED
=3.0V
3.25
-61
8
-485
2.4
-240
3.8
0.33
-18
10
-40
22
-26
80
0.4
-5
I
OH
=-200µA
I
OL
=8mA
V
OUT
=2.4V
V
OUT
=0.4V
V
OUT
=0.0V
Pin 3 Open
Pin 11 Open
Pin 12 Open
2.0
0.8
30
7.0
V
CCA
=V
CCD
=4.75 to 5.25V
∆V
CM
=200mV
3.56
2.4
3.08
3.10
TEST CONDITIONS
LIMITS
Min
Typ
30
10
3.4
3.8
30
60
60
3.7
3.4
0.3
-40
30
-95
0.75
0.72
0.72
0.4
-24.4
3.86
Max
41.2
13.5
3.70
4.50
UNIT
mA
mA
V
V
dB
dB
dB
V
V
V
mA
mA
mA
V
V
V
V
V
µA
µA
V
V
mA
mA
mA
mA
1998 Oct 07
4
Philips Semiconductors
Product specification
Postamplifier with link status indicator
SA5214
AC ELECTRICAL CHARACTERISTICS
Min and Max limits apply over the operating temperature range at V
CCA
= V
CCD
= +5.0V unless otherwise specified. Typical data applies at
V
CCA
= V
CCD
= +5.0V and T
A
= 25°C.
SYMBOL
f
OP
BW
A1
V
INH
V
INL
R
IN1
C
IN1
R
IN2
C
IN2
R
OUT1
C
OUT1
V
HYS
V
THR
t
TLH
t
THL
t
RFD
t
PWD
PARAMETER
Maximum operating frequency
Small signal bandwidth (differential
OUT
1
/IN
1
)
Maximum Functional A1
input signal (single ended)
Minimum Functional A1
input signal (single ended)
Input resistance
(differential at IN
1
)
Input capacitance (differential at IN
1
)
Input resistance
(differential at IN
2
)
Input capacitance (differential at IN
2
)
Output resistance (differential at OUT
1
)
Output capacitance (differential at
OUT
1
)
Hysteresis voltage
Threshold voltage range (FLAG ON)
TTL Output Rise Time
20% to 80%
TTL Output Fall Time
80% to 20%
t
TLH
/t
THL
mismatch
Pulse width distortion of output
50mV
P-P
, 1010. . .input
Distortion=
T
H
-T
L
T
H
+T
L
10
2
2.5
2.5
%
Test circuit
Test circuit, @ 50MHz R
RHYST
=5k
R
THRESH
=47k
Test Circuit
Test Circuit
TEST CONDITIONS
Test circuit
Test circuit
Test Circuit
Test CIrcuit
1
LIMITS
Min
60
Typ
75
75
1.6
12
1200
2
1200
2
25
2
3
12
1.3
1.2
0.1
Max
UNIT
MHz
MHz
V
P-P
mV
P-P
Ω
pF
Ω
pF
Ω
pF
mV
P-P
mV
P-P
ns
ns
ns
NOTES:
1. The SA5214 is capable of detecting a much lower input level. Operation under 12mV
P-P
cannot be guaranteed by present day automatic
testers.
1998 Oct 07
5
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