OCTAL BUS SWITCH
IDT74FST3244
IDT74FST32244
Integrated Device Technology, Inc.
FEATURES:
Bus switches provide zero delay paths
Extended commercial range of –40°C to +85°C
Low switch on-resistance
TTL-compatible input and output levels
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in QSOP, TSSOP, SOIC, SSOP, and PDIP
• Hot insertion capability
• Very low power dissipation
•
•
•
•
•
DESCRIPTION:
The FST3244/32244 belong to IDT’s family of Bus switches.
Bus switch devices perform the function of connecting or iso-
lating two ports without providing any inherent current sink or
source capability. Thus they generate little or no noise of their
own while providing a low resistance path for an external driver.
These devices connect input and output ports through an n-
channel FET. When the gate-to-source junction of this FET
is adequately forward-biased, the device conducts and the
resistance between input and output ports is small. Without
adequate bias on the gate-to-source junction of the FET, the
FET is turned off, therefore with no V
CC
applied, the device
has not insertion capability.
The low on-resistance and simplicity of the connection be-
tween input and output ports reduces the delay in this path to
close to zero.
The FST32244 integrates terminating resistors in the de-
vice, thus eliminating the need for external 25Ω series resis-
tors.
The FST3244 and FST32244 are octal TTL-compatible bus
switches. The OE pins provide output enable control for all 8
bits. These devices are pin-compatible with and functionally
similar to the FCT244T.
FUNCTIONAL BLOCK DIAGRAM
1
O E
PIN CONFIGURATION
1
OE
1
A
0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
P20-1
SO20-2 16
SO20-8
15
SO20-9
SO20-7 14
13
12
11
V
CC
2
OE
1
B
0
2
A
3
1
B
1
2
A
2
1
B
2
2
A
1
1
B
3
2
A
0
1
A
0
1
A
1
1
B
0
1
B
1
2
B
3
1
A
1
2
B
2
1
A
2
2
B
1
1
A
3
2
B
0
1
A
2
1
B
2
1
A
3
1
B
3
2
O E
GND
2
A
0
2
A
1
2
A
2
2
B
0
2
B
1
DIP/SOIC/SSOP
QSOP/TSSOP
TOP VIEW
3255 drw 02
PIN DESCRIPTION
2
B
2
2
B
3
3255 drw 01
Pin Names
xOE
xAx
xBx
Description
Output Enable Inputs (Active LOW)
A Port Bits
B Port Bits
3255 tbl 01
2
A
3
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
©1999
Integrated Device Technology, Inc.
JANUARY 1999
1
DSC-3255/4
IDT74FST3244, IDT74FST32244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE
(1)
1
OE
2
OE
ABSOLUTE MAXIMUM RATINGS
(1)
Description
DISCONNECT
CONNECT
1
A to
1
B
CONNECT
2
A to
2
B
CONNECT
1
A to
1
B and
2
A to
2
B
3255 tbl 02
Symbol
Description
Max.
–0.5 to +7.0
–65 to +150
128
Unit
V
°C
mA
H
L
H
L
H
H
L
L
V
TERM(2)
Terminal Voltage with Respect
to GND
T
STG
Storage Temperature
I
OUT
Maximum Continuous Channel
Current
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
CAPACITANCE
(1)
Symbol
Parameter
C
IN
Control Input Capacitance
C
I/O
Switch Input/Output
Capacitance
NOTES:
1. Capacitance is characterized but not tested.
2. T
A
= 25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V
3255 lnk 03
Conditions
(2)
Typ. Unit
8
pF
Switch Off
13
pF
3255 lnk 04
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
, Control and Switch terminals.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Condition Apply Unless Otherwise Specified:
Operating Conditions: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OFF
I
CC
Parameter
Control Input HIGH Voltage
Control Input LOW Voltage
Control Input HIGH Current
Control Input LOW Current
Current During
Bus Switch DISCONNECT
Clamp Diode Voltage
Switch Power Off Leakage
Quiescent Power Supply Current
V
CC
= Min., I
IN
= –18mA
V
CC
= 0V, V
IN
or V
O
≤
5.5V
V
CC
= Max., V
IN
= GND or V
CC
Test Conditions
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= GND
V
CC
= Max., V
O
= 0 to 5V
Min.
2.0
—
—
—
—
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
–0.7
—
0.1
Max.
—
0.8
±1
±1
±1
±1
–1.2
±1
3
V
µA
µA
3255 lnk 05
Unit
V
V
µA
µA
BUS SWITCH IMPEDANCE OVER OPERATING RANGE
Following Condition Apply Unless Otherwise Specified:
Operating Conditions: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
R
ON
Parameter
Switch CONNECT Resistance
A to B
(2)
Test Conditions
V
CC
= Min., V
IN
= 0.0V 3xxx
I
ON
= 30mA
I
ON
= 15mA
I
OS
Short Circuit Current, A to B
(3)
A(B) = 0V, B(A) = V
CC
32xxx
32xxx
V
CC
= Min., V
IN
= 2.4V 3xxx
Min.
—
17
—
20
100
Typ.
(1)
5
28
10
35
—
Max.
7
40
15
48
—
mA
3255 tbl 06
Unit
Ω
NOTES:
1. Typical values are at V
CC
= 5.0V, +25°C ambient.
2. The voltage drop between the indicated ports divided by the current through the switch.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
2
IDT74FST3244, IDT74FST32244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4,5)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
1 Enable Pin Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
2 Enable Pins Toggling
fi = 10MHz
50% Duty Cycle
Min.
—
—
Typ.
(2)
0.5
120
Max.
1.5
160
Unit
mA
µA/
MHz/
Enable
mA
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4
V
IN
= GND
—
2.4
3.2
—
2.9
4.7
3255 tbl 07
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25¡C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. C
PD
= l
CCD
/V
CC
C
PD
= Power Dissipation Capacitance
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
i
N)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
i
= Control Input Frequency
N = Number of Control Inputs Toggling at f
i
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Condition Apply Unless Otherwise Specified:
Operating Conditions: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
32244
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
|Q
CI
|
Description
(1)
Data Propagation Delay
A to B, B to A
(2)
Switch CONNECT Delay
X
OE to A or B
Switch DISCONNECT Delay
X
OE to A or B
Charge Injection During Switch
DISCONNECT,
X
OE to A or B
(3)
Min.
—
1.5
1.5
—
Typ.
—
—
—
1.5
Max.
0.25
6.5
5.5
—
1.25
5.6
5.2
—
32244
Unit
ns
ns
ns
pC
3255 tbl 08
NOTES:
1. See test circuits and waveforms.
2. The bus switch contributes no Propagation Delay other than the RC Delay of the
load interacting with the RC of the switch.
5. lQ
CI
l is the charge injection for a single switch DISCONNECT and applies to either single switches or multiplexers.
lQ
DCI
l is the charge injection for a multiplexer as the multiplexed port switches from one path to another. Charge injection is
reduced because the injection from the DISCONNECT of the first path is compensated by the CONNECT of the second path.
3
IDT74FST3244, IDT74FST32244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
7.0V
500
Ω
Pulse
Generator
V
IN
D.U.T.
50pF
R
T
500
Ω
C
L
3255 lnk 03
PROPAGATION DELAY
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
3255 lnk 06
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
V
OUT
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Open
Switch
Closed
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
V
CC
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3255 lnk 07
t
SU
t
H
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator
CHARGE INJECTION
t
SU
t
H
1MHz
Signal
Generator
Enable/Select
Switch In
(1)
Switch Out
D.U.T.
V
OUT
(3)
ENABLE AND DISABLE TIMES
C
L
=
50pF
ENABLE
CONTROL
INPUT
t
PZL
t
PLZ
3.5V
1.5V
t
PHZ
1.5V
0V
0.3V V
OH
0V
3255 lnk 08
Switch In (Mux)
(2)
DISABLE
3V
1.5V
0V
3.5V
NOTES:
1. Select is used with multiplexers for measuring |Q
DCI
| during multiplexer
select. During all other tests Enable is used.
2. Used with multiplexers to measure |Q
DCI
| only.
3. Charge Injection =
∆V
OUT
C
L
, with Enable toggling for |Q
CI
| or Select
toggling for |Q
DCI
|.
∆V
OUT
is the change in V
OUT
and is measured with
a 10MΩ probe.
3255 lnk 04
PULSE WIDTH
LOW -HIGH-LOW
PULSE
t
W
HIGH-LOW -HIGH
PULSE
1.5V
3255 lnk 05
OUTPUT
SW ITCH
NORMALLY
CLO SE D
LOW
t
PZH
OUTPUT
SW ITCH
NORMALLY
O P EN
HIGH
0.3V
V
OL
1.5V
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
4
IDT74FST3244, IDT74FST32244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
ID T
XX
FST
Tem p. R ange
X
Fam ily
XXX
Device Type
X
Package
PY
P
SO
Q
PG
Shrink Sm all Outline-Package (SO20-7)
Plastic Dip (P20-1)
Sm all O utline IC (S O 20-2)
Quarter-size Sm all O utline Package (SO20-8)
Thin Shrink Sm all Outline Package (SO 20-9)
244 8-Bit S witch
2244 8-Bit Sw itch with Resistors
3
74
Octal Bus Sw itch
-40°C to +85°C
3255 drw 09
5
PCB设计
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