Si4730/31-A10
B
ROADCAST
AM/FM R
ADIO
R
ECEIVER
Features
SCLK
SEN
Rev. 1.0 10/07
Copyright © 2007 by Silicon Laboratories
RCLK
SDIO
RST
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Worldwide FM band support
AM/FM digital tuning
(76–108 MHz)
Worldwide AM band support
(520–1710 kHz)
Excellent real-world performance
Freq synthesizer with integrated VCO
Advanced AM/FM seek tuning
Automatic frequency control (AFC)
Automatic gain control (AGC)
Integrated LDO regulator
Digital FM stereo decoder
Programmable de-emphasis
Adaptive noise suppression
No manual alignment necessary
Programmable reference clock
Volume control
Programmable soft mute control
RDS/RBDS processor (Si4731 only)
2-wire and 3-wire control interface
2.7 to 5.5 V supply voltage
Firmware upgradeable
Wide range of ferrite loop sticks and
Ordering Information:
See page 25.
air loop antennas supported
3 x 3 x 0.55 mm 20-pin QFN package
Pb-free/RoHS compliant
Pin Assignments
Si4730/31-GM
(Top View)
GPO2/INT
Applications
Table and portable radios
Stereos
Mini/micro systems
CD/DVD players
Portable media players
Boom boxes
Cellular handsets
Modules
Clock radios
Mini HiFi
Entertainment systems
Car radios
GPO1
GPO3
17
10
NC
NC
1
20
19
18
16
FMI 2
Description
RFGND 3
AMI 4
The Si4730/31 is the first digital CMOS AM/FM radio receiver IC that integrates
the complete tuner function from antenna input to audio output.
GND
PAD
RST 5
6
Si473x
AMI
AM
ANT
RFGND
LNA
RDS
(Si4731)
LOW-IF
Patents pending
AGC
FM
ANT
ADC
DAC
ROUT
FMI
LNA
DSP
AGC
2.7 - 5.5 V
VDD
GND
LDO
ADC
DAC
LOUT
AFC
CONTROL
INTERFACE
VIO
1.5-3.6V
Notes:
1.
To ensure proper operation and
receiver performance, follow the
guidelines in “AN384: Si4730/31
AM/FM Receiver Layout Guide.”
Silicon Laboratories will evaluate
schematics and layouts for qualified
customers.
2.
Place Si4730/31 as close as
possible to antenna jack and keep
the FMI and AMI traces as short as
possible.
RCLK
SCLK
SEN
SDIO
Si4730/31-A10
VIO
Functional Block Diagram
7
8
9
11 VDD
NC
15 NC
14 LOUT
13 ROUT
12 GND
2
Si4730/31-A10
Rev. 1.0
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Si4730/31-A10
T
ABLE O F
C
ONTENTS
Section
Page
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Rev. 1.0
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4.4. AM receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4.5. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.6. De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.7. Stereo DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4.8. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.9. RDS/RBDS Processor (Si4731 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.10. Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.11. Seek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.12. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.13. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.14. GPO Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.15. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
4.16. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.17. Programming with Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6. Pin Descriptions: Si4730/31-GM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8. Package Markings (Top Marks) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.1. Si4730/31 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.2. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
9. Package Outline: Si4730/31 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
10. PCB Land Pattern: Si4730/31 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
11. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
3
Si4730/31-A10
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
Supply Voltage
Interface Supply Voltage
Symbol
V
DD
V
IO
V
DDRISE
V
IORISE
T
A
Test Condition
Min
2.7
1.5
10
10
Typ
—
—
Max
5.5
3.6
—
—
Unit
V
V
µs
µs
C
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Power Supply Power-Up Rise Time
—
—
Interface Power Supply Power-Up Rise Time
Ambient Temperature
–20
25
85
Note:
All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.
Typical values apply at VDD = 3.3 V and 25
C
unless otherwise stated. Parameters are tested in production unless
otherwise stated.
Table 2. Absolute Maximum Ratings
1,2
Parameter
Symbol
V
DD
V
IO
I
IN
V
IN
Value
Unit
V
V
Supply Voltage
–0.5 to 5.8
–0.5 to 3.9
10
Interface Supply Voltage
Input Current
3
Input Voltage
3
mA
V
C
–0.3 to (VIO + 0.3)
–40 to 95
Operating Temperature
RF Input Level
4
T
OP
Storage Temperature
T
STG
–55 to 150
0.4
C
V
pK
Notes:
1.
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2.
The Si4730/31 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2 kV
HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3.
For input pins SCLK, SEN, SDIO, RST, RCLK, GPO1, GPO2, and GPO3.
4.
At RF input pins, FMI and AMI.
4
Rev. 1.0
Si4730/31-A10
Table 3. DC Characteristics
(V
DD
= 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, T
A
= –20 to 85 C)
Parameter
FM Mode
Supply Current
Supply Current
1
Symbol
Test Condition
Min
Typ
Max
Unit
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I
FM
I
FM
Low SNR level
—
19.8
23
RDS Supply Current
AM Mode
—
19.9
23
Supply Current
I
AM
Analog Output Mode
—
16.8
20.5
Supplies and Interface
Interface Supply Current
I
IO
I
IO
—
—
400
10
1
820
20
Powerdown Current
2
I
DD
Interface Powerdown Current
2
Low Level Input Voltage
3
SCLK, RCLK inactive
—
10
—
High Level Input Voltage
3
V
IH
V
IL
I
IH
I
IL
0.7 x VIO
—
—
—
0.3 x VIO
10
High Level Input Current
3
Low Level Input Current
3
V
IN
= VIO = 3.6 V
V
IN
= 0 V,
V
IO
= 3.6 V
–10
—
–10
—
10
—
High Level Output Voltage
4
V
OH
V
OL
I
OUT
= 500 µA
0.8 x VIO
—
—
Low Level Output Voltage
4
I
OUT
= –500 µA
—
0.2 x VIO
Notes:
1.
LNA is automatically switched to higher current mode for optimum sensitivity in weak signal conditions.
2.
Specifications are guaranteed by characterization.
3.
For input pins SCLK, SEN, SDIO, RST, and RCLK.
4.
For output pins SDIO, GPO1, GPO2, and GPO3.
Rev. 1.0
I
FM
—
19.2
22
mA
mA
mA
mA
µA
µA
µA
V
V
µA
µA
V
V
5
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