TS555
Low-power single CMOS timer
Datasheet
-
production data
Features
•
Very low power consumption:
– 110 µA typ at V
CC
= 5 V
– 90 µa typ at V
CC
= 3 V
N
DIP8
(plastic package)
•
High maximum astable frequency of 2.7 MHz
•
Pin-to-pin functionally-compatible with bipolar
NE555
•
Wide voltage range: +2 V to +16 V
•
Supply current spikes reduced during output
transitions
•
High input impedance: 10
12
Ω
D
SO8
(plastic micropackage)
•
Output compatible with TTL, CMOS and logic
MOS
Description
The TS555 is a single CMOS timer with very low
consumption:
P
TSSOP8
(thin shrink small outline package)
(I
cc(TYP)
TS555 = 110 µA at V
CC
= +5 V versus
I
cc(TYP)
NE555 = 3 mA),
and high frequency:
(f
f(max.)
TS555 = 2.7 MHz versus
f
(max)
NE555 = 0.1 MHz).
Pin connections
(top view)
Timing remains accurate in both monostable and
astable mode.
The TS555 provides reduced supply current
spikes during output transitions, which enable the
use of lower decoupling capacitors compared to
those required by bipolar NE555.
With the high input impedance (10
12
Ω),
timing
capacitors can also be minimized.
August 2014
This is information on a product in full production.
DocID4077 Rev 3
1/21
www.st.com
Contents
TS555
Contents
1
2
3
4
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
Schematic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1
4.2
Monostable operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Astable operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1
5.2
5.3
DIP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TSSOP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6
7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
DocID4077 Rev 3
TS555
Absolute maximum ratings and operating conditions
1
Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
Symbol
V
CC
I
OUT
Supply voltage
Output current
Thermal resistance junction to ambient
DIP8
(1)
SO8
(2)
TSSOP8
(2)
Thermal resistance junction to case
DIP8
(1)
SO8
(2)
TSSOP8
(2)
Junction temperature
Storage temperature range
Human body model (HBM)
(3)
ESD
Machine model (MM)
(4)
Charged device model (CDM)
(5)
Parameter
Value
+18
± 100
85
125
120
41
40
37
+150
-65 to +150
1500
200
1000
V
Unit
V
mA
R
thja
°C/W
R
thjc
°C/W
T
j
T
stg
°C
°C
1. Short-circuits can cause excessive heating. These values are typical and specified for a single layer PCB.
2. Short-circuits can cause excessive heating. These values are typical and specified for a four layers PCB.
3. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
4. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5
Ω).
This is done for all couples of
connected pin combinations while the other pins remain floating.
5. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to the ground.
Table 2. Operating conditions
Symbol
V
CC
I
OUT
Supply voltage
Output sink current
Output source current
Operating free air temperature range
TS555C
TS555I
TS555M
Parameter
Value
2 to 16
10
50
0 to +70
-40 to +125
-55 to +125
Unit
V
mA
T
oper
°C
DocID4077 Rev 3
3/21
21
Schematic diagrams
TS555
2
Schematic diagrams
Figure 1. Schematic diagram
4/21
DocID4077 Rev 3
TS555
Figure 2. Block diagram
Schematic diagrams
Table 3. Functional table
Reset
Low
High
High
High
Trigger
x
Low
High
High
Threshold
x
x
High
Low
Output
Low
High
Low
Previous state
Note:
Low: level voltage
≤
minimum voltage specified
High: level voltage
≥
maximum voltage specified
x: irrelevant
DocID4077 Rev 3
5/21
21
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