P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter
Rev. 03 — 15 December 2004
Product data
1. General description
The P89LPC924/925 are single-chip microcontrollers designed for applications
demanding high-integration, low cost solutions over a wide range of performance
requirements. The P89LPC924/925 is based on a high performance processor
architecture that executes instructions in two to four clocks, six times the rate of
standard 80C51 devices. Many system-level functions have been incorporated into
the P89LPC924/925 in order to reduce component count, board space, and system
cost.
2. Features
2.1 Principal features
s
4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page
size, and single byte erase.
s
256-byte RAM data memory.
s
Two 16-bit counter/timers. Each timer may be configured to toggle a port output
upon timer overflow or to become a PWM output.
s
Real-Time clock that can also be used as a system timer.
s
4-input 8-bit multiplexed A/D converter/single DAC output. Two analog
comparators with selectable inputs and reference source.
s
Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
s
400 kHz byte-wide I
2
C-bus communication port.
s
Configurable on-chip oscillator with frequency range and RC oscillator options
(selected by user programmed Flash configuration bits). The RC oscillator (factory
calibrated to
±1
%) option allows operation without external oscillator
components. Oscillator options support frequencies from 20 kHz to the maximum
operating frequency of 18 MHz. The RC oscillator option is selectable and fine
tunable.
s
2.4 V to 3.6 V V
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s
15 I/O pins minimum. Up to 18 I/O pins while using on-chip oscillator and reset
options.
Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
2.2 Additional features
s
20-pin TSSOP package.
s
A high performance 80C51 CPU provides instruction cycle times of 111 ns to
222 ns for all instructions except multiply and divide when executing at 18 MHz.
This is six times the performance of the standard 80C51 running at the same
clock frequency. A lower clock frequency for the same performance results in
power savings and reduced EMI.
s
In-Application Programming of the Flash code memory. This allows changing the
code in a running application.
s
Serial Flash programming allows simple in-circuit production coding. Flash
security bits prevent reading of sensitive application programs.
s
Watchdog timer with separate on-chip oscillator, requiring no external
components. The watchdog prescaler is selectable from eight values.
s
Low voltage reset (Brownout detect) allows a graceful system shutdown when
power fails. May optionally be configured as an interrupt.
s
Idle and two different Power-down reduced power modes. Improved wake-up from
Power-down mode (a low interrupt input starts execution). Typical Power-down
current is 1
µA
(total Power-down with voltage comparators disabled).
s
Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent
spurious and incomplete resets. A software reset function is also available.
s
Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
s
Programmable port output configuration options:
x
quasi-bidirectional,
x
open drain,
x
push-pull,
x
input-only.
s
Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value
of the pins match or do not match a programmable pattern.
s
LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
s
Controlled slew rate port outputs to reduce EMI. Outputs have approximately
10 ns minimum ramp times.
s
Only power and ground connections are required to operate the P89LPC924/925
when internal reset option is selected.
s
Four interrupt priority levels.
s
Eight keypad interrupt inputs, plus two additional external interrupt inputs.
s
Second data pointer.
s
Schmitt trigger port inputs.
s
Emulation support.
9397 750 14471
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 15 December 2004
2 of 49
Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
3. Ordering information
Table 1:
Ordering information
Package
Name
P89LPC924FDH
P89LPC925FDH
TSSOP20
TSSOP20
Description
plastic thin shrink small outline package;
20 leads; body width 4.4 mm
plastic thin shrink small outline package;
20 leads; body width 4.4 mm
Version
SOT360-1
SOT360-1
Type number
3.1 Ordering options
Table 2:
Part options
Flash memory
4 kB
8 kB
Temperature range
−40 °C
to +85
°C
−40 °C
to +85
°C
Frequency
0 MHz to 18 MHz
0 MHz to 18 MHz
Type number
P89LPC924FDH
P89LPC925FDH
9397 750 14471
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 15 December 2004
3 of 49
Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
4. Block diagram
P89LPC924/925
HIGH PERFORMANCE
ACCELERATED 2-CLOCK 80C51 CPU
2 kB/4 kB/8 kB
CODE FLASH
INTERNAL BUS
256-BYTE
DATA RAM
PORT 3
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
UART
REAL-TIME CLOCK/
SYSTEM TIMER
I
2
C
TIMER 0
TIMER 1
WATCHDOG TIMER
AND OSCILLATOR
KEYPAD
INTERRUPT
ANALOG
COMPARATORS
PROGRAMMABLE
OSCILLATOR DIVIDER
CPU
CLOCK
ON-CHIP
RC
OSCILLATOR
ADC1/DAC1
CRYSTAL
OR
RESONATOR
CONFIGURABLE
OSCILLATOR
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
002aaa786
Fig 1. Block diagram.
9397 750 14471
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 15 December 2004
4 of 49
Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
5. Pinning information
5.1 Pinning
handbook, halfpage
KBI0/CMP2/P0.0 1
P1.7 2
P1.6 3
20 P0.1/CIN2B/KBI1/AD10
19 P0.2/CIN2A/KBI2/AD11
18 P0.3/CIN1B/KBI3/AD12
P89LPC924FDH
P89LPC925FDH
RST/P1.5 4
VSS 5
XTAL1/P3.1 6
CLKOUT/XTAL2/P3.0 7
INT1/P1.4 8
SDA/INT0/P1.3 9
SCL/T0/P1.2 10
17 P0.4/CIN1A/KBI4/AD13/DAC1
16 P0.5/CMPREF/KBI5
15 VDD
14 P0.6/CMP1/KBI6
13 P0.7/T1/KBI7
12 P1.0/TXD
11 P1.1/RXD
002aaa787
Fig 2. TSSOP20 pin configuration.
9397 750 14471
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 15 December 2004
5 of 49
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