NC7SZ02 — TinyLogic
®
UHS 2-Input NOR Gate
March 2008
NC7SZ02
TinyLogic
®
UHS 2-Input NOR Gate
Features
■
Space saving SOT23 or SC70 5-lead package
■
Ultra small MicroPak™ leadless package
■
Ultra High Speed: t
PD
2.4ns typ into 50pF at 5V V
CC
■
High Output Drive: ±24mA at 3V V
CC
■
Broad V
CC
Operating Range: 1.65V–5.5V
■
Matches the performance of LCX when operated at
General Description
The NC7SZ02 is a single 2-Input NOR Gate from
Fairchild's Ultra High Speed Series of TinyLogic
. The
device is fabricated with advanced CMOS technology to
achieve ultra high speed with high output drive while
maintaining low static power dissipation over a very
broad V
CC
operating range. The device is specified to
operate over the 1.65V to 5.5V V
CC
range. The inputs
and output are high impedance when V
CC
is 0V. Inputs
tolerate voltages up to 6V independent of V
CC
operating
voltage.
3.3V V
CC
■
Power down high impedance inputs/output
■
Overvoltage tolerant inputs facilitate 5V to 3V
translation
■
Patented noise/EMI reduction circuitry implemented
Ordering Information
Order
Number
NC7SZ02M5X
NC7SZ02P5X
NC7SZ02L6X
Package
Number
MA05B
MAA05A
MAC06A
Product Code
Top Mark
7Z02
Z02
JJ
Package Description
5-Lead SOT23, JEDEC MO-178,
1.6mm
5-Lead SC70, EIAJ SC-88a,
1.25mm Wide
6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
3k Units on Tape and Reel
5k Units on Tape and Reel
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1996 Fairchild Semiconductor Corporation
NC7SZ02 Rev. 1.12.0
www.fairchildsemi.com
NC7SZ02 — TinyLogic
®
UHS 2-Input NOR Gate
Connection Diagram
Pin Assignments for SC70 and SOT23
Logic Symbol
IEEE/IEC
Function Table
Y
=
A+B
(Top View)
Pad Assignments for MircoPak
Inputs
A
L
L
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
B
L
H
L
H
Y
H
L
L
L
(Top Thru View)
Pin Description
Pin Names
A, B
Y
NC
Description
Inputs
Output
No Connect
©1996 Fairchild Semiconductor Corporation
NC7SZ02 Rev. 1.12.0
www.fairchildsemi.com
2
NC7SZ02 — TinyLogic
®
UHS 2-Input NOR Gate
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
@ V
IN
<
–0.5V
@ V
IN
> 6V
DC Output Diode Current
@ V
OUT
<
–0.5V
@ V
OUT
>
6V, V
CC
= GND
DC Output Current
DC V
CC
/GND Current
Storage Temperature
Parameter
Rating
–0.5V to +6V
–0.5V to +6V
–0.5V to +6V
–50mA
+20mA
–50mA
+20mA
±50mA
±50mA
–65°C to +150°C
150°C
260°C
200mW
150mW
I
OK
I
OUT
I
CC
/ I
GND
T
STG
T
J
T
L
P
D
Junction Temperature under Bias
Junction Lead Temperature (Soldering, 10 seconds)
Power Dissipation @ +85°C
SOT23-5
SC70-5
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
Supply Voltage Operation
Supply Voltage Data Retention
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time
V
CC
@ 1.8V, 2.5V ± 0.2V
V
CC
@ 3.3V ± 0.3V
V
CC
@ 5.0V ± 0.5V
Thermal Resistance
SOT23-5
SC70-5
Parameter
Rating
1.65V to 5.5V
1.5V to 5.5V
0V to 5.5V
0V to V
CC
–
40°C to +85°C
0ns/V to 20ns/V
0ns/V to 10ns/V
0ns/V to 5ns/V
300°C/W
425°C/W
θ
JA
Notes:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1996 Fairchild Semiconductor Corporation
NC7SZ02 Rev. 1.12.0
www.fairchildsemi.com
3
NC7SZ02 — TinyLogic
®
UHS 2-Input NOR Gate
DC Electrical Characteristics
T
A
=
+25°C
Symbol
V
IH
V
IL
V
OH
T
A
=
–40°C to +85°C
Max.
Min.
0.75 x V
CC
0.7 x V
CC
Parameter
HIGH Level
Input Voltage
LOW Level Input
Voltage
HIGH Level
Output Voltage
V
CC
(V)
1.65–1.95
2.3–5.5
1.65–1.95
2.3–5.5
1.65
1.8
2.3
3.0
4.5
1.65
2.3
3.0
3.0
4.5
Conditions
Min.
0.75 x V
CC
0.7 x V
CC
Typ.
Max.
Unit
V
0.25 x V
CC
0.3 x V
CC
V
IN
=
V
IL
I
OH
=
–100µA
1.55
1.7
2.2
2.9
4.4
I
OH
=
–4mA
I
OH
=
–8mA
I
OH
=
–16mA
I
OH
=
–24mA
I
OH
=
–32mA
V
IN
=
V
IH
I
OL
=
100µA
1.29
1.9
2.4
2.3
3.8
1.65
1.8
2.3
3.0
4.5
1.52
2.15
2.80
2.68
4.20
0.0
0.0
0.0
0.0
0.0
I
OL
=
4mA
I
OL
=
8mA
I
OL
=
16mA
I
OL
=
24mA
I
OL
=
32mA
V
IN
=
5.5V, GND
V
IN
or V
OUT
=
5.5V
0.08
0.10
0.15
0.22
0.22
0.1
0.1
0.1
0.1
0.1
0.24
0.3
0.4
0.55
0.55
±1
1
1.55
1.7
2.2
2.9
4.4
1.29
1.9
2.4
2.3
3.8
0.25 x V
CC
0.3 x V
CC
V
V
V
OL
LOW Level
Output Voltage
1.65
1.8
2.3
3.0
4.5
1.65
2.3
3.0
3.0
4.5
0.1
0.1
0.1
0.1
0.1
0.08
0.3
0.4
0.55
0.55
±10
10
V
I
IN
I
OFF
Input Leakage
Current
Power Off
Leakage
Current
Quiescent
Supply Current
0–5.5
0.0
µA
µA
I
CC
1.65–5.5
V
IN
=
5.5V, GND
2.0
20
µA
©1996 Fairchild Semiconductor Corporation
NC7SZ02 Rev. 1.12.0
www.fairchildsemi.com
4
NC7SZ02 — TinyLogic
®
UHS 2-Input NOR Gate
AC Electrical Characteristics
Figure
Min. Typ. Max. Min. Max. Units Number
2.0
2.0
0.8
0.5
0.5
C
L
=
50pF,
R
L
=
500Ω
(2)
T
A
=
+25°C
5.3
4.4
2.9
2.3
1.9
2.9
2.4
4
23
30
T
A
=
–40°C
to +85°C
2.0
2.0
0.8
0.5
0.5
1.5
0.8
12.0
10
7.0
4.7
4.1
5.2
4.5
Symbol
t
PLH
, t
PHL
Parameter
Propagation Delay
V
CC
(V)
1.65
1.8
2.5 ± 0.2
3.3 ± 0.3
5.0 ± 0.5
Conditions
C
L
=
15pF,
R
L
=
1MΩ
11.5
9.5
6.5
4.5
3.9
5.0
4.3
ns
Figure 1
Figure 3
t
PLH,
t
PHL
C
IN
C
PD
Propagation Delay
Input Capacitance
Power Dissipation
Capacitance
3.3 ± 0.3
5.0 ± 0.5
0
3.3
5.0
1.5
0.8
ns
pF
pF
Figure 1
Figure 3
Figure 2
Note:
2. C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current
consumption (I
CCD
) at no output loading and operating at 50% duty cycle. (See Figure 2.) C
PD
is related to I
CCD
dynamic operating current by the expression: I
CCD
=
(C
PD
)(V
CC
)(f
IN
) + (I
CC
static).
AC Loading and Waveforms
C
L
includes load and stray capacitance
Input PRR
=
1.0MHz; t
w
=
500ns
Figure 1. AC Test Circuit
Figure 3. AC Waveforms
Input
=
AC Waveform; t
r
=
t
f
=
1.8 ns;
PRR
=
10 MHz; Duty Cycle
=
50%
Figure 2. I
CCD
Test Circuit
©1996 Fairchild Semiconductor Corporation
NC7SZ02 Rev. 1.12.0
www.fairchildsemi.com
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
