®
VIPer20B
VIPer20BSP
SMPS PRIMARY I.C.
PRELIMINARY DATA
T YPE
VIPer20B/ SP
V
DSS
400V
I
n
1.3 A
R
DS(on)
8.7
Ω
10
1
FEATURE
s
ADJUSTABLE SWITCHING FREQUENCY UP
TO 200KHZ
s
CURRENT MODE CONTROL
s
SOFT START AND SHUT DOWN CONTROL
s
AUTOMATIC BURST MODE OPERATION IN
STAND-BY CONDITION ABLE TO MEET
”BLUE ANGEL” NORM (1W TOTAL POWER
CONSUMPTION)
s
INTERNALLY TRIMMED ZENER
REFERENCE
s
UNDERVOLTAGE LOCK-OUT WITH
HYSTERESIS
s
INTEGRATED START-UP SUPPLY
s
AVALANCHE RUGGED
s
OVERTEMPERATURE PROTECTION
s
LOW STAND-BY CURRENT
s
ADJUSTABLE CURRENT LIMITATION
BLOCK DIAGRAM
PENTAWATT HV
Power SO-10
DESCRIPTION
VIPer20B™ combines on the same silicon chip a
state-of-the-art PWM circuit together with an
optimized high voltage avalanche rugged Vertical
Power MOSFET (400V 1.3A).
Typical applications cover off line power supplies
with a secondary max power capability of 30W. It
is compatible from both primary or secondary
regulation loop despite using around 50% less
components when compared with a discrete
solution. Burst mode operation is an additional
feature of this device, offering the possibility to
operate in stand-by mode without extra
components.
OSC
DRAIN
ON/OFF
OSCILLATOR
SECURITY
LATCH
VDD
UVLO
LOGIC
R/S
FF
S
Q
PWM
LATCH
R1
S
FF
R2 R3
Q
OVERTEMP.
DETECTOR
0.5 V
+
_
2
µs
delay
300 ns
Blanking
+
_
+
0.5V
_
6 V/A
_
13 V
+
ERROR
AMPLIFIER
CURRENT
AMPLIFIER
4.5 V
COMP
SOURCE
FC00490
September 1999
1/17
VIPer20B / VIPer20BSP
ORDERING NUMBERS
PENT AW ATT HV
VIPer20B
PowerSO -10
VIPer20BSP
PINS FUNCTIONAL DESCRIPTION
DRAIN PIN:
Integrated power MOSFET drain pin. It provides
internal bias current during start-up via an
integrated high voltage current source which is
switched off during normal operation. The device
is able to handle an unclamped current during its
normal operation, assuring self protection against
voltage surges, PCB stray inductance, and
allowing a snubberless operation for low output
power.
SOURCE PIN:
Power MOSFET source pin. Primary side circuit
common ground connection.
VDD PIN :
This pin provides two functions :
current source, and can easily be connected to
the output of an optocoupler. Note that any
overvoltage due to regulation loop failure is still
detected by the error amplifier through the V
DD
voltage, which cannot overpass 13V. The
output voltage will be somewhat higher than
the nominal one, but still under control.
COMP PIN :
This pin provides two functions :
-
It is the output of the error transconductance
amplifier, and allows for the connection of a
compensation network to provide the desired
transfer function of the regulation loop. Its
bandwidth can be easily adjusted to the
needed value with usual components value. As
stated
above,
secondary
regulation
configurations are also implemented through
the COMP pin.
-
It corresponds to the low voltage supply of the
control part of the circuit. If V
DD
goes below 8V,
the start-up current source is activated and the
output power MOSFET is switched off until the
V
DD
voltage reaches 11V. During this phase,
the internal current consumption is reduced,
the V
DD
pin is sourcing a current of about 1mA
and the COMP pin is shorted to ground. After
that, the current source is shut down, and the
device tries to start up by switching again.
-
When the COMP voltage is going below 0.5V,
the shut-down of the circuit occurs, with a zero
duty cycle for the power MOSFET. This feature
can be used to switch off the converter, and is
automatically activated by the regulation loop
(whatever is the configuration) to provide a
burst mode operation in case of negligible
output power or open load condition.
OSC PIN :
An R
T
-C
T
network must be connected on that pin
to define the switching frequency. Note that
despite the connection of R
T
to V
DD
, no
significant frequency change occurs for V
DD
varying from 8V to 15V. It provides also a
synchronisation capability, when connected to an
external frequency source.
-
This pin is also connected to the error amplifier,
in order to allow primary as well as secondary
regulation configurations. In case of primary
regulation, an internal 13V trimmed reference
voltage is used to maintain V
DD
at 13V. For
secondary regulation, a voltage between 8.5V
and 12.5V will be put on V
DD
pin by
transformer design, in order to stuck the output
of the transconductance amplifier to the high
state. The COMP pin behaves as a constant
3/17
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