CCD Delay Line Series
MN3870S
NTSC-Compatible CCD Comb Filter with Built-in 1 H Video Signal Delay Element
Overview
The MN3870S is a 4 f
SC
CMOS CCD comb filter with
a built-in 4 f
SC
CMOS CCD signal delay element for video
signal processing applications.
It contains such components as a fourfold-frequency
circuit, a shift register clock driver, a CCD analog shift
register switchable between 911, 1 and 908 / 906 stages,
and a resampling output amplifier.
It samples the input using the supplied clock signal with
a frequency of four times the color signal subcarrier fre-
quency (3.58 MHz) and subtracts between the 911- and
1-stage CCD output signals to produce the color signal
comb characteristics for the NTSC system.
It also uses this fourfold frequency to drive a 908- or
906-stage CCD and samples the input to produce, after
adding in the attached filter delay, a delay of 1 H (the
horizontal scan period) when the SW pin is left open.
Pin Assignment
X1
V
BB
N.C.
VGC1
VOC
VINC
N.C.
N.C.
V
SS1
V
DD1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PCOUT
&
VCOIN
N.C.
V
SS3
V
DD3
V
DD2
V
SS2
VGC2
SW
VINY
VOY
Features
Single 5.0 V power supply
Low power consumption based on CMOS process
Low EMI levels from clock during driving
True comb filter produced by the subtraction of the
through signal and the 1 H delay signal
( TOP VIEW )
SOP020-P-0300C
Applications
VCRs, Video cameras
1
CCD Delay Line Series
Pin Descriptions
Pin No.
1
2
4
5
6
9
10
11
12
13
14
15
16
17
18
20
Symbol
XI
V
BB
VGC1
VOC
VINC
V
SS1
V
DD1
VOY
VINY
SW
VGC2
V
SS2
V
DD2
V
DD3
V
SS3
PCOUT
&VCOIN
Note: Leave pin 13 open.
MN3870S
Pin Name
3.58 MHz clock input
Substrate connection
Output gate connection (1)
C signal output
C signal input
GND (1)
Power supply (1)
Y signal output
Y signal input
Switch controlling number of stages for Y signal
delay
Output gate connection (2)
GND (2)
Power supply (2)
Power supply (3)
GND (3)
Phase comparator output and voltage controlled
oscillator input
Remarks
Ground for analog circuits
For analog circuits
Ground for digital signals
For digital signals
For phase-locked loop
Ground for phase-locked loop
3
MN3870S
Operating Conditions
Parameter
Power supply voltage
Input clock frequency
Input clock amplitude (sine wave)
Ambient temperature
Symbol
V
DD
f
ck
V
ck
Ta
0.25
–20
min
4.75
typ
5.00
3.579545
0.3
CCD Delay Line Series
max
5.25
1.0
60
Unit
V
MHz
V
P–P
˚C
Electrical Characteristics
V
DD
=5.0V, V
ck
=0.3V
P-P
(sine wave), V
in
=0.5V
P-P
(sine wave), f
ck
=3.579545MHz, f=196.7kHz, Ta=25˚C
Parameter
Power supply voltage
Insertion gain for VOC pin
Total harmonic distortion for VOC
pin
Signal-to-noise ratio for VOC pin
Output impedance for VOC pin
Comb characteristics for VOC pin
Symbol
I
DD
IG
THD
S/N
Z
O
Com1
Conditions
Average current
f
sig
=3.579545MHz
f
sig
=3.26486MHz
3.264 86 MHz output (V
P-P
)/
noise output (rms)
min
–9
typ
55
–5.5
0.5
max
80
–2
2.5
Unit
mA
dB
%
dB
48
56
300
600
–25
–20
–20
–40
–20
Ω
dB
dB
dB
dB
dB
MHz
3.571678MHz/3.579545MHz
(f
sc
–1/2f
H
) / (f
sc
)
3.256993MHz/3.264860MHz
(f
sc
–20.5f
H
) / (f
sc
–20f
H
)
3.902097MHz/3.894230MHz
(f
sc
–20.5f
H
) / (f
sc
–20f
H
)
–35
–30
–30
–50
–30
2.5
–1.5
5.5
1.5
1
48
56
Com2
Clock leak for VOC pin
NC1
NC2
3.58-MHz component/main
signal in output signal
14.32-MHz component/main
signal in output signal
–3 dB for 196.7 kHz
f
sig
=196.7kHz
f
sig
=196.7MHz
Signal output (P–P)/noise output
(rms)
3.58-MHz component/main
signal in output signal
14.32-MHz component/main
signal in output signal
Signal bandwidth for VOY pin
Insertion gain for VOY pin
Total harmonic distortion for VOY
pin
Signal-to-noise ratio for VOY pin
Clock leak for VOY pin
BW
IG
THD
S/N
4.5
4.5
dB
%
dB
NC3
NC4
–50
–20
63.46
250
–40
–10
dB
dB
µs
Delay for VOY pin
Output impedance for VOY pin
Crosstalk
τ
D
Z
O
CT
f
sig
=196.7kHz
500
–32
Ω
dB
4
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