IDT74LVC646A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS OCTAL BUS
TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
FEATURES:
–
–
–
–
–
–
–
–
–
–
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
1.27mm pitch SOIC, 0.65mm pitch SSOP,
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages
Extended commercial range of – 40°C to +85°C
V
CC
= 3.3V ±0.3V, Normal Range
V
CC
= 2.3V to 3.6V, Extended Range
CMOS power levels (0.4µ W typ. static)
Rail-to-Rail output swing for increased noise margin
All inputs, outputs and I/O are 5 Volt tolerant
Supports hot insertion
IDT74LVC646A
DESCRIPTION
The LVC646A device consists of bus-transceiver circuits, D-type flip-
flops, and control circuitry arranged for multiplexed transmission of data
directly from the input bus or from the internal registers. Data on the A or
B bus is clocked into the registers on the low-to-high transition of the
appropriate clock (CLKAB or CLKBA) input.
Output-enable (OE) and direction-control (DIR) inputs control the
transceiver functions. In the transceiver mode, data present at the high-
impedance port is stored in either register or in both. The select-control
(SAB and SBA) inputs can multiplex stored and real-time (transparent
mode) data. DIR determines which bus receives data when
OE
is low. In
the isolation mode (OE high), A data is stored in one register and B data
can be stored in the other register. When an output function is disabled, the
input function is still enabled and can be used to store and transmit data.
Only one of the two buses, A or B, can be driven at a time.
The LVC646A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
Drive Features for LVC646A:
– High Output Drivers:
±24mA
– Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
Functional Block Diagram
OE
21
3
D IR
C LK B A
SBA
CLKAB
SAB
23
22
1
2
One of eight channels
1
D
C
1
A
1
4
20
1
D
B
1
C
1
TO SEVEN OTHER CHANNELS
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
APRIL 1999
DSC-4594/1
IDT74LVC646A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
CLKAB
SAB
D IR
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
GND
1
2
3
4
5
6
7
8
9
10
11
12
SO24-2
SO24-7
SO24-8
SO24-9
ABSOLUTE MAXIMUM RATINGS
(1)
V
CC
CLKBA
SBA
OE
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
24
23
22
21
20
19
18
17
16
15
14
13
Symbol
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through
each V
CC
or GND
Max.
– 0.5 to +6.5
– 0.5 to +6.5
– 65 to +150
– 50 to +50
– 50
±100
Unit
V
V
°C
mA
mA
mA
8LVC
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
CAPACITANCE
(T
A
= +25°C, f = 1.0MH
Z
)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
5.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
8LVC Link
PIN DESCRIPTION
Pin Names
Ax
Bx
CLKAB, CLKBA
SAB, SBA
OE
DIR
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output-enable Input
Direction-control Input
NOTE:
1. As applicable to the device type.
FUNCTION TABLE
OE
X
X
H
H
L
L
L
L
DIR
X
X
X
X
L
L
H
H
CLKAB
↑
X
↑
H or L
X
X
X
H or L
(1)
Data I/O
SAB
X
X
X
X
X
X
L
H
SBA
X
X
X
X
L
H
X
X
A1-A8
Input
Unspecified
(2)
Input
Input disabled
Output
Output
Input
Input
B1-B8
Unspecified
(2)
Input
Input
Input disabled
Input
Input
Output
Output
Operation or Function
Store A, B unspecified
(2)
Store B, A unspecified
(2)
Store A and B data
Isolation, hold storage
Real-time B data to A bus
Stored B data to A bus
Real Time A data to B bus
Stored A data to B bus
Inputs
CLKBA
X
↑
↑
H or L
X
H or L
X
X
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑
= LOW-to-HIGH Transition
2. The data output functions may be enabled or disabled by various signals at the
OE
or DIR inputs. Data input functions are always enabled; i.e., data
at the bus pins willl be stored on every LOW-to-HIGH transition on the clock inputs.
2
IDT74LVC646A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
BUS
A
BUS
B
BUS
A
BUS
B
OE
L
DIR
L
CLKAB
X
CLKBA
X
SAB
X
SBA
L
DIR
H
OE
L
CLKAB
X
CLKBA
X
SAB
L
SBA
X
REAL-TIME TRANSFER
BUS B TO BUS A
REAL-TIME TRANSFER
BUS A TO BUS B
BUS
A
BUS
B
BUS
A
BUS
B
OE
X
X
H
DIR
X
X
X
CLKAB
↑
X
↑
CLKBA
X
↑
↑
SAB
X
X
X
SBA
X
X
X
DIR
L
H
OE
L
L
CLKAB
X
H or L
CLKBA
H or L
X
SAB
X
H
SBA
H
X
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A AND/OR B
3
IDT74LVC646A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= – 40°C To +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
OFF
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input Leakage Current
High Impedance Output Current
(3-State Output pins)
Input/Output Power Off Leakage
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
or V
O
≤
5.5V
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
3.6
≤
V
IN
≤
5.5V
(2)
Quiescent Power Supply
Current Variation
One input at V
CC
- 0.6V,
other inputs at V
CC
or GND
—
—
—
—
—
—
—
– 0.7
100
—
—
—
±50
– 1.2
—
10
10
500
µA
8LVC Link
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
I
= 0 to 5.5V
V
O
= 0 to 5.5V
Min.
1.7
2
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
Max.
—
—
0.7
0.8
±5
±10
Unit
V
V
µA
µA
µA
V
mV
µA
NOTES:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
2. This applies in the disabled state only.
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
V
CC
= 2.7V
V
CC
= 3.0V
I
OL
= 12mA
I
OL
= 24mA
2.2
—
—
—
—
—
Max.
—
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
8LVC Link
Unit
V
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to +85°C.
4
IDT74LVC646A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
EXTENDED COMMERCIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, V
CC
= 3.3V
±
0.3V, TA = 25°C
Symbol
C
PD
C
PD
Parameter
Power dissipation capacitance per transceiver outputs enabled
Power dissipation capacitance per transceiver outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
75
9
Unit
pF
pF
SWITCHING CHARACTERISTICS
(1)
V
CC
= 2.5V ± 0.2V
Symbol
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PHZ
t
PLZ
t
W
t
SU
t
H
t
SK(o)
Parameter
Propagation Delay
Ax to Bx or Bx to Ax
Propagation Delay
CLK to Ax or Bx
Propagation Delay
SBA or SAB to Ax or Bx
Output Enable Time
OE
to Ax
Output Enable Time
DIR to Bx
Output Disable Time
OE
to Ax
Output Disable Time
DIR to Bx
Pulse Duration
Setup Time, data before CLK↑
Hold Time, data after CLK↑
Output Skew
(2)
Min
.
—
—
—
—
—
—
—
—
—
—
—
—
Max.
—
—
—
—
—
—
—
—
—
—
—
—
Min
.
150
—
—
—
—
—
—
—
3.3
1.6
1.7
—
V
CC
= 2.7V
Max.
—
7.9
8.8
9.9
10.2
10.4
8.9
8.7
—
—
—
—
V
CC
= 3.3V ± 0.3V
Min.
150
1.4
1.3
1.4
1
1.2
1
1.1
3.3
1.5
1.7
—
Max.
—
7.4
8.4
8.6
8.2
8.3
7.5
7.9
—
—
—
500
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
NOTES:
1. See test circuits and waveforms. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5
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