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MK1418STRLF

产品描述Clock Generator, 24.576MHz, CMOS, PDSO8, SOIC-8
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小29KB,共4页
制造商IDT (Integrated Device Technology)
标准
下载文档 详细参数 选型对比 全文预览

MK1418STRLF概述

Clock Generator, 24.576MHz, CMOS, PDSO8, SOIC-8

MK1418STRLF规格参数

参数名称属性值
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码SOIC
包装说明SOIC-8
针数8
Reach Compliance Codecompliant
ECCN代码EAR99
JESD-30 代码R-PDSO-G8
JESD-609代码e3
长度4.8895 mm
端子数量8
最高工作温度70 °C
最低工作温度
最大输出时钟频率24.576 MHz
封装主体材料PLASTIC/EPOXY
封装代码LSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, LOW PROFILE
峰值回流温度(摄氏度)260
主时钟/晶体标称频率14.318 MHz
认证状态Not Qualified
座面最大高度1.5494 mm
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层MATTE TIN
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
宽度3.937 mm
uPs/uCs/外围集成电路类型CLOCK GENERATOR, OTHER

MK1418STRLF文档预览

MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Description
The MK1418 and MK1420 are the ideal way to
generate clocks for new sound cards. The MK1420
provides clocks for Analog Devices’ AD1848,
Crystal Semiconductor’s CS4231, and Yamaha’s
OPL3L, OPL3LS, and OPL4. The MK1420 uses
either a 14.318 MHz crystal, or a 14.318 MHz bus
clock input to synthesize the clocks required to
drive the codec, and the 33.868 MHz required for
the FM or wavetable music synthesizer. The chips
are ideal for add-in sound cards and motherboards
with integrated sound. In an 8 pin SOIC, the
MK1420 can save component count, board space,
and cost over surface mount crystals, and increase
reliability by eliminating three or four mechanical
devices from the board.
MicroClock offers many other parts with stereo
codec support. The MK1430 has 5 output clocks,
the MK1448 has 7, the MK1444 has eight
including DSP clocks, and the MK1450/1 offers
Pentium™ and SCSI support, plus the stereo
codec clocks.
Features
• Packaged in 8 pin SOIC
• Input crystal or clock frequency of 14.318 MHz
• MK1418 is clock input only
• MK1420 output clock frequencies of 16.934MHz,
24.576 MHz, 33.868 MHz, and 14.318 MHz
• Advanced, low power CMOS process
• Lowest jitter in industry for best audio
performance
• Insensitive to input clock duty cycle
• 50% (typ) 14.318 MHz duty cycle with crystal
AC Coupling/Portable Applications
For applications in portable computers, it is possible
to drive the input clock with a 3.3V, 14.318MHz
clock by a.c. coupling using a 0.01µF capacitor
connected in series to the CLKIN pin. But the
operating VDD on pin 2 must be 5V±10%. This
technique is also effective if the input clock doesn’t
meet the VIH and VIL specifications on page 3.
Additional Clocks or Features
If more than these four output clocks or features
such as power down are needed, MicroClock has
many other products in development. Consult
MicroClock for your specific needs.
Block Diagram
VDD GND
Output
Buffer
14.318 MHz
crystal or clock
X1
Crystal
Oscillator
X2
16.934 MHz
24.576 MHz
33.868 MHz
(MK1420 only)
14.318 MHz
(MK1420 only)
Clock Synthesis
Circuitry
Output
Buffer
Output
Buffer
Output
Buffer
1
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A
MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Pin Assignments
MK1418
ICLK
VDD
GND
16.9M
1
2
3
4
8
7
6
5
GND
VDD
GND
24.6M
V
0.1µF
14.318 MHz
crystal
Suggested Layout
for MK1420
clock only
Pin 1
2
3
8
7
33Ω (optional)
14.3MHz out
6
33Ω (optional)
33.9MHz out
MK1420
X1
VDD
GND
16.9M
1
2
3
4
8
7
6
5
X2
14.3M
33.9M
24.6M
G
4
5
33Ω (optional)
33Ω (optional)
16.9MHz out
24.6MHz out
Pin Descriptions for MK1420
Number
1
2
3
4
5
6
7
8
Name
X1
VDD
GND
16.9M
24.6M
33.9M
14.3M
X2
Type
I
P
P
O
O
O
O
O
Description
Crystal Connection. Connect to a 14.318 MHz crystal or clock.
Connect to +5V.
Connect to ground.
16.9344 MHz clock output for stereo codec.
24.576 MHz clock output for stereo codec.
33.868 MHz clock output for OPL4.
14.318 MHz clock buffered output for OPL3 or PCMCIA controller.
Crystal Connection to a 14.318 MHz crystal, or leave unconnected for clock input.
Key: I = Input, O = output, P = power supply connection
External Components/Crystal Selection
A minimum number of external components are required for proper oscillation. For a crystal input, one
22pF load capacitor should be connected to each of the X1 and X2 pins and ground, and a parallel
resonant 14.318 MHz, 16pF load, crystal is recommended. Values near these are acceptable, as is a series
resonant crystal, but either will result in frequencies which are slightly (up to 0.06%) different from the
ideal. For a clock input, connect to X1 and leave X2 unconnected. A decoupling capacitor of 0.1µF should
be connected between VDD and GND, and 33Ω terminating resistors may be used on the clock outputs.
These terminating resistors are unnecessary for clock traces less than 1” (25mm).
2
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A
MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Electrical Specifications
Parameter
Supply Voltage, VDD
Inputs
Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output High Voltage, VOH
Output Low Voltage, VOL
Operating Supply Current, IDD
Input Capacitance
Actual Mean Frequency versus Target
Conditions
Referenced to GND
Referenced to GND
Referenced to GND
Max of 20 seconds
-65
4.5
3.5
IOH=-4mA
IOH=-25mA
IOL=25mA
No Load
Outputs
14.31818
Time above 2.5V
0.8 to 2.0V
2.0 to 0.8V
Time above 1.5V
Time above 1.5V
Time above 1.5V
Time above 1.5V
Pins 4, 5, 6 only
Pins 4, 5, 6 only
20
80
1.5
1.5
60
55
55
55
400
VDD-0.4
2.4
0.4
18
7
±0.2
Minimum
Typical
Maximum
7
VDD+.5V
VDD+.5V
70
260
150
5.5
2.5
2.5
1.5
Units
V
V
V
°C
°C
°C
V
V
V
V
V
V
mA
pF
%
MHz
%
ns
ns
%
%
%
%
ps
ps
ABSOLUTE MAXIMUM RATINGS (note 1)
-0.5
-0.5
0
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
AC CHARACTERISTICS
Input Clock or Crystal Frequency
Input Clock Duty Cycle, 14.318MHz
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle, 24.576MHz
Output Clock Duty Cycle, 16.9344 MHz
Output Clock Duty Cycle, 33.868MHz
Output Clock Duty Cycle, 14.318 MHz, Note 3
Absolute Clock Period Jitter, except 14.3
One Sigma Clock Period Jitter, except 14.3
40
45
45
45
-400
45
50
50
50
200
60
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. Typical values are at 25°C.
3. If crystal is used as input with C
L
= 16pf. If a clock is used as input, the duty cycle of the 14.318MHz output will be the same as the
input clock.
3
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A
MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Package Outline and Package Dimensions
8 pin SOIC
Symbol
A
b
D
E
H
e
h
Q
L
Inches
Min
Max
0.055 0.061
0.013 0.019
0.185 0.200
0.150 0.160
0.225 0.245
.050 BSC
0.015
0.004
0.01
0.016 0.035
Millimeters
Min
Max
1.397 1.5494
0.330
0.483
4.699
5.080
3.810
4.064
5.715
6.223
1.27 BSC
0.381
0.102
0.254
0.406
0.889
E
Pin 1
H
D
Q
e
b
c
h x 45°
A
L
Ordering Information
Part/Order Number
MK1418S
MK1418STR
MK1420S
MK1420STR
Marking
MK1418S
MK1418S
MK1420S
MK1420S
Package
8 pin SOIC
Add tape and reel
8 pin SOIC
Add tape and reel
Temperature
0-70°C
0-70°C
0-70°C
0-70°C
While the information presented herein has been checked for both accuracy and reliability, MicroClock Incorporated assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by MicroClock. MicroClock reserves the right to change any circuitry or specifications without notice. MicroClock does not
authorize or warrant any MicroClock product for use in life support devices or critical medical instruments.
1201BO.7
4
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A

MK1418STRLF相似产品对比

MK1418STRLF MK1418SLF
描述 Clock Generator, 24.576MHz, CMOS, PDSO8, SOIC-8 Clock Generator, 24.576MHz, CMOS, PDSO8, SOIC-8
是否Rohs认证 符合 符合
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology)
零件包装代码 SOIC SOIC
包装说明 SOIC-8 LSOP,
针数 8 8
Reach Compliance Code compliant compliant
ECCN代码 EAR99 EAR99
JESD-30 代码 R-PDSO-G8 R-PDSO-G8
JESD-609代码 e3 e3
长度 4.8895 mm 4.8895 mm
端子数量 8 8
最高工作温度 70 °C 70 °C
最大输出时钟频率 24.576 MHz 24.576 MHz
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LSOP LSOP
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, LOW PROFILE SMALL OUTLINE, LOW PROFILE
峰值回流温度(摄氏度) 260 260
主时钟/晶体标称频率 14.318 MHz 14.318 MHz
认证状态 Not Qualified Not Qualified
座面最大高度 1.5494 mm 1.5494 mm
最大供电电压 5.5 V 5.5 V
最小供电电压 4.5 V 4.5 V
标称供电电压 5 V 5 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL
端子面层 MATTE TIN Matte Tin (Sn)
端子形式 GULL WING GULL WING
端子节距 1.27 mm 1.27 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 40 30
宽度 3.937 mm 3.937 mm
uPs/uCs/外围集成电路类型 CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER

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