MC26LS30
Dual Differential
(EIA−422−A)/
Quad Single−Ended
(EIA−423−A) Line Drivers
The MC26LS30 is a low power Schottky set of line drivers which
can be configured as two differential drivers which comply with
EIA−422−A standards, or as four single−ended drivers which comply
with EIA−423−A standards. A mode select pin and appropriate choice
of power supplies determine the mode. Each driver can source and
sink currents in excess of 50 mA.
In the differential mode (EIA−422−A), the drivers can be used up to
10 Mbaud. A disable pin for each driver permits setting the outputs
into a high impedance mode within a +10 V common mode range.
In the single−ended mode (EIA−423−A), each driver has a slew rate
control pin which permits setting the slew rate of the output signal so
as to comply with EIA−423−A and FCC requirements and to reduce
crosstalk. When operated from symmetrical supplies (+5.0 V), the
outputs exhibit zero imbalance
The MC26LS30 is available in a 16−pin surface mount package.
Operating temperature range is −40°C to +85°C.
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MARKING
DIAGRAM
16
16
1
SO−16
D SUFFIX
CASE 751B
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
MC26LS30D
AWLYWW
•
Operates as Two Differential EIA−422−A Drivers, or Four
•
•
•
•
•
•
•
•
Single−Ended EIA−423−A Drivers
High Impedance Outputs in Differential Mode
Short Circuit Current Limit In Both Source and Sink Modes
±10
V Common Mode Range on High Impedance Outputs
±15
V Range on Inputs
Low Current PNP Inputs Compatible with TTL, CMOS, and MOS
Outputs
Individual Output Slew Rate Control in Single−Ended Mode
Replacement for the AMD AM26LS30 and National Semiconductor
DS3691
Pb−Free Packages are Available
Representative Block Diagrams
Single−Ended Mode
EIA−423−A
SR−A
Input A
Out A
SR−B
Input B
Out B
SR−C
Input C
Out C
SR−D
Input D
Out D
Input D
Enable CD
V
CC
−1
V
EE
−8
Gnd−5
Mode−4
Input A
PIN CONNECTIONS
V
CC
1
Input A 2
Input B/
3
Enable AB
Mode 4
Gnd
Input C/
Enable CD
Input D
V
EE
5
6
7
8
(Top View)
16 SR−A
15 Output A
14 Output B
13 SR−B
12 SR−C
11 Output C
10 Output D
9 SR−D
ORDERING INFORMATION
Device
MC26LS30D
MC26LS30DG
Package
SO−16
SO−16
(Pb−Free)
SO−16
SO−16
(Pb−Free)
Shipping
†
48 Units/Rail
48 Units/Rail
Differential Mode
EIA−422−A
Enable AB
Out A
Out B
MC26LS30DR2
MC26LS30DR2G
2500 Tape & Reel
2500 Tape & Reel
Out C
Out D
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2005
1
March, 2005 − Rev. 2
Publication Order Number:
MC26LS30/D
MC26LS30
MAXIMUM OPERATING CONDITIONS
(Pin numbers refer to SO−16 package only.)
Rating
Power Supply Voltage
Input Voltage (All Inputs)
Applied Output Voltage when in High Impedance Mode
(V
CC
= 5.0 V, Pin 4 = Logic 0, Pins 3, 6 = Logic 1)
Output Voltage with V
CC
, V
EE
= 0 V
Output Current
Junction Temperature
Symbol
V
CC
V
EE
V
in
V
za
V
zb
I
O
T
J
Value
−0.5, +7.0
−7.0, +0.5
−0.5, +20
±15
±15
Self limiting
−65, +150
−
°C
Unit
Vdc
Vdc
Vdc
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Devices should not be operated at these limits. The “Recommended Operating Conditions” table provides conditions for actual device operation.
RECOMMENDED OPERATING CONDITIONS
Rating
Power Supply Voltage (Differential Mode)
Power Supply Voltage (Single−Ended Mode)
Input Voltage (All Inputs)
Applied Output Voltage (when in High Impedance Mode)
Applied Output Voltage, V
CC
= 0
Output Current
Operating Ambient Temperature (See text)
All limits are not necessarily functional concurrently.
Symbol
V
CC
V
EE
V
CC
V
EE
V
in
V
za
V
zb
I
O
T
A
Min
+4.75
−0.5
+4.75
−5.25
0
−10
−10
−65
−40
Typ
5.0
0
+5.0
−5.0
−
−
−
−
−
Max
+5.25
+0.3
+5.25
−4.75
+15
+10
+10
+65
+85
Unit
Vdc
Vdc
mA
°C
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2
MC26LS30
ELECTRICAL CHARACTERISTICS
(EIA−422−A differential mode, Pin 4
p
0.8 V, −40°C
tT
A
t
85°C, 4.75 V
p
V
CC
p
5.25 V,
V
EE
= Gnd, unless otherwise noted. Pin numbers refer to SO−16 package only.)
Characteristic
Output Voltage (see Figure 1)
Differential, R
L
=
∞,
V
CC
= 5.25 V
Differential, R
L
= 100
Ω,
V
CC
= 4.75 V
Change in Differential Voltage, R
L
= 100
Ω
(Note 4)
Offset Voltage, R
L
= 100
Ω
Change in Offset Voltage*, R
L
= 100
Ω
Output Current (each output)
Power Off Leakage, V
CC
= 0, −10 V
p
V
O
p
+10 V
High Impedance Mode, V
CC
= 5.25 V, −10 V
p
V
O
p
+10 V
Short Circuit Current (Note 2)
High Output Shorted to Pin 5 (T
A
= 25°C)
High Output Shorted to Pin 5 (−40°C
t
T
A
t+85°C)
Low Output Shorted to +6.0 V (T
A
= 25°C)
Low Output Shorted to +6.0 V (−40°C
t
T
A
t
+85°C)
Inputs
Low Level Voltage
High Level Voltage
Current @ V
in
= 2.4 V
Current @ V
in
= 15 V
Current @ V
in
= 0.4 V
Current, 0
p
V
in
p
15 V, V
CC
= 0
Clamp Voltage (I
in
= −12 mA)
Power Supply Current (V
CC
= +5.25 V, Outputs Open)
(0
p
Enable
p
V
CC
)
Symbol
V
OD1
V
OD2
∆V
OD2
V
OS
∆V
OS
I
OLK
I
OZ
I
SC−
I
SC−
I
SC+
I
SC+
V
IL
V
IH
I
IH
I
IHH
I
IL
I
IX
V
IK
I
CC
−
16
30
Min
−
2.0
−
−
−
−100
−100
−150
−150
60
50
−
2.0
−
−
−200
−
−1.5
Typ
4.2
2.6
10
2.5
10
0
0
−95
−
75
−
−
−
0
0
−8.0
0
−
Max
6.0
−
400
3.0
400
+100
+100
−60
−50
150
150
0.8
−
40
100
−
−
−
Unit
Vdc
Vdc
mVdc
Vdc
mVdc
µA
mA
Vdc
Vdc
µA
Vdc
mA
TIMING CHARACTERISTICS
(EIA−422−A differential mode, Pin 4
p
0.8 V, T
A
= 25°C, V
CC
= 5.0 V, V
EE
= Gnd, (Notes 1 and 3)
unless otherwise noted.)
Characteristic
Differential Output Rise Time (Figure 3)
Differential Output Fall Time (Figure 3)
Propagation Delay Time − Input to Differential Output
Input Low to High (Figure 3)
Input High to Low (Figure 3)
Skew Timing (Figure 3)
t
PDH
to t
PDL
for Each Driver
Max to Min t
PDH
Within a Package
Max to Min t
PDL
Within a Package
Enable Timing (Figure 4)
Enable to Active High Differential Output
Enable to Active Low Differential Output
Enable to 3−State Output From Active High
Enable to 3−State Output From Active Low
1.
2.
3.
4.
5.
Symbol
t
r
t
f
t
PDH
t
PDL
t
SK1
t
SK2
t
SK3
t
PZH
t
PZL
t
PHZ
t
PLZ
Min
−
−
−
−
−
−
−
−
−
−
−
Typ
70
70
90
90
9.0
2.0
2.0
150
190
80
110
Max
200
200
200
200
ns
−
−
−
ns
300
350
350
300
Unit
ns
ns
ns
All voltages measured with respect to Pin 5.
Only one output shorted at a time, for not more than 1 second.
Typical values established at +25°C, V
CC
= +5.0 V, V
EE
= −5.0 V.
V
in
switched from 0.8 to 2.0 V.
Imbalance is the difference between
V
O2
with V
in
t
0.8 V and
V
O2
with V
in
u
2.0 V.
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3
MC26LS30
ELECTRICAL CHARACTERISTICS
(EIA−423−A single−ended mode, Pin 4
q
2.0 V, −40°C
t
T
A
t
85°C, 4.75 V
p
V
CC
,
|V
EE
p
5.25 V, (Notes 1 and 3) unless otherwise noted).
Characteristic
Output Voltage (V
CC
=
V
EE
= 4.75 V)
Single−Ended Voltage, R
L
=
∞
(Figure 2)
Single−Ended Voltage, R
L
= 450
Ω,
(Figure 2)
Voltage Imbalance (Note 5), R
L
= 450
Ω
Slew Control Current (Pins 16, 13, 12, 9)
Output Current (Each Output)
Power Off Leakage, V
CC
= V
EE
= 0, −6.0 V
p
V
O
p
+6.0 V
Short Circuit Current (Output Short to Ground, Note 2)
V
in
p
0.8 V (T
A
= 25°C)
V
in
p
0.8 V (−40°C
t
T
A
t
+85°C)
V
in
w
2.0 V (T
A
= 25°C)
V
in
w
2.0 V (−40°C
t
T
A
t
+85°C)
Inputs
Low Level Voltage
High Level Voltage
Current @ V
in
= 2.4 V
Current @ V
in
= 15 V
Current @ V
in
= 0.4 V
Current, 0
p
V
in
p
15 V, V
CC
= 0
Clamp Voltage (I
in
= −12 mA)
Power Supply Current (Outputs Open)
V
CC
= +5.25 V, V
EE
= −5.25 V, V
in
= 0.4 V
Symbol
V
O1
V
O2
∆V
O2
I
SLEW
I
OLK
I
SC+
I
SC+
I
SC−
I
SC−
V
IL
V
IH
I
IH
I
IHH
I
IL
I
IX
V
IK
I
CC
I
EE
Min
4.0
3.6
−
−
−100
60
50
−150
−150
−
2.0
−
−
−200
−
−1.5
−
−22
Typ
4.2
3.95
0.05
±120
0
80
−
−95
−
−
−
0
0
−8.0
0
−
17
−8.0
Max
6.0
6.0
0.4
−
+100
150
150
−60
−50
0.8
−
40
100
−
−
−
30
−
µA
µA
mA
Unit
Vdc
Vdc
Vdc
µA
Vdc
mA
TIMING CHARACTERISTICS
(EIA−423−A single−ended mode, Pin 4
q
2.0 V, T
A
= 25°C, V
CC
= 5.0 V, V
EE
= −5.0 V, (Notes 1 and
3) unless otherwise noted.)
Characteristic
Output Timing (Figure 5)
Output Rise Time, C
C
= 0
Output Fall Time, C
C
= 0
Output Rise Time, C
C
= 50 pF
Output Fall Time, C
C
= 50 pF
Rise Time Coefficient (Figure 16)
Propagation Delay Time, Input to Single Ended Output (Figure 5)
Input Low to High, C
C
= 0
Input High to Low, C
C
= 0
Skew Timing, C
C
= 0 (Figure 5)
t
PDH
to t
PDL
for Each Driver
Max to Min t
PDH
Within a Package
Max to Min t
PDL
Within a Package
1.
2.
3.
4.
5.
Symbol
t
r
t
f
t
r
t
f
C
rt
t
PDH
t
PDL
t
SK4
t
SK5
t
SK6
Min
−
−
−
−
−
−
−
−
−
−
Typ
65
65
3.0
3.0
0.06
100
100
15
2.0
5.0
Max
300
300
−
−
−
300
300
ns
−
−
−
Unit
ns
µs
µs/pF
ns
All voltages measured with respect to Pin 5.
Only one output shorted at a time, for not more than 1 second.
Typical values established at +25°C, V
CC
= +5.0 V, V
EE
= −5.0 V.
V
in
switched from 0.8 to 2.0 V.
Imbalance is the difference between
V
O2
with V
in
t
0.8 V and
V
O2
with V
in
u
2.0 V.
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4
MC26LS30
Table 1
Inputs
Operation
Differential
(EIA 422 A)
(EIA−422−A)
V
CC
+5.0
V
EE
Gnd
Mode
0
0
0
0
0
0
1
1
1
1
1
X
A
0
1
X
1
0
1
0
1
0
0
0
X
B
0
0
1
0
0
0
0
0
1
0
0
X
C
0
0
0
0
0
1
0
0
0
1
0
X
D
0
1
1
0
1
X
0
0
0
0
1
X
A
0
1
Z
1
0
1
0
1
0
0
0
Z
Outputs
B
1
0
Z
0
1
0
0
0
1
0
0
Z
C
1
0
0
1
0
Z
0
0
0
1
0
Z
D
0
1
1
0
1
Z
0
0
0
0
1
Z
S ge
Single−Ended
ded
(EIA 423 A)
(EIA−423−A)
+5.0
50
−5.0
50
X
X = Don’t Care
Z = High Impedance (Off)
0
X
V
CC
V
CC
R
L
/2
V
in
(0.8 or 2.0 V)
Mode = 0
V
OD2
R
L
/2
V
OS
Mode = 1
V
EE
V
in
(0.8 or 2.0 V)
R
L
C
L
V
O
Figure 1. Differential Output Test
Figure 2. Single−Ended Output Test
V
CC
V
in
V
in
100
500 pF
V
OD
1.5 V
t
PDH
+3.0 V
1.5 V
0V
t
PDL
90%
50%
10%
t
r
t
f
S.G.
90%
50%
V
out
10%
NOTES:
1. S.G. set to: f
p
1.0 MHz; duty cycle = 50%; t
r
, t
f
,
p
10 ns.
2. t
SK1
=
t
PDH
−t
PDL
for each driver.
3. t
SK2
computed by subtracting the shortest t
PDH
from the longest t
PDH
of the 2 drivers within a package.
4. t
SK3
computed by subtracting the shortest t
PDL
from the longest t
PDL
of the 2 drivers within a package.
Figure 3. Differential Mode Rise/Fall Time and Data Propagation Delay
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