CXD1172AM/AP
6-bit 20MSPS Video A/D Converter (CMOS)
Description
CXD1172AM/AP is a 6-bit CMOS A/D converter for
video use. The adoption of a 2-step parallel system
achieves low consumption at a maximum conversion
speed of 20MSPS minimum, 35MSPS typical.
Features
•
Resolution: 6-bit
±
1/2LSB
•
Max. sampling frequency: 20MSPS
•
Low power consumption: 40mW (at 20MSPS typ.)
(Reference current excluded)
•
Built-in sampling and hold circuit.
•
3-state TTL compatible output.
•
Power supply: 5V single
•
Low input capacitance: 4pF
•
Reference impedance: 250Ω (typ.)
Applications
TV, VCR digital systems and a wide range of fields
where high speed A/D conversion is required.
Structure
Silicon gate CMOS monolithic IC
CXD1172AM
16 pin SOP (Plastic)
CXD1172AP
16 pin DIP (Plastic)
Absolute Maximum Ratings
(Ta = 25°C)
7
V
• Supply voltage V
DD
• Reference voltage
V
RT
, V
RB
V
DD
+ 0.5 to V
SS
– 0.5 V
• Input voltage
V
IN
V
DD
+ 0.5 to V
SS
– 0.5 V
(Analog)
• Input voltage
V
CLK
V
DD
+ 0.5 to V
SS
– 0.5 V
(Digital)
• Output voltage V
OH
, V
OL
V
DD
+ 0.5 to V
SS
– 0.5 V
(Digital)
• Storage temperature
Tstg
–55 to +150
°C
Recommended Operating Conditions
• Supply voltage AV
DD
, AV
SS
4.75 to 5.25
V
DV
DD
, DV
SS
4.75 to 5.25
V
• Reference input voltage
V
RB
0 to 4.1
V
V
RT
0.9 to 5.0
V
V
RT
– V
RB
0.9 to AV
DD
V
• Analog input voltage
V
IN
V
RB
to V
RT
V
• Clock pulse width
T
PW1
, T
PW0
23ns (min.) to 1.1µs (max.)
• Operating temperature
Topr
–20 to +75
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E89320C78-PS
CXD1172AM/AP
Electrical Characteristics
Item
Symbol
(V
DD
= 5V, V
RB
= 1.0V, V
RT
= 2.0V, Ta = 25°C)
Conditions
V
DD
= 4.75 to 5.25V
Ta = –20 to +75°C
V
IN
= 1.0 to 2.0V
f
IN
= 1kHz ramp
Fc = 20MSPS
NTSC ramp wave input
3
Envelope
V
IN
= 1.5V + 0.07Vrms
175
Potential difference to VRT
Potential difference to VRB
V
DD
= 4.75 to 5.25V
Ta = –20 to +75°C
V
IH
= V
DD
V
DD
= max.
V
IL
= 0V
V
OH
= V
DD
+ 0.5V
V
DD
= min.
V
OL
= 0.4V
–1.1
3.7
18
±0.3
End point
±0.3
NTSC 40 IRE mod ramp
Fc = 14.3MSPS
1.0
1.0
40
4
30
±0.5
LSB
±0.5
%
deg
ps
ns
ns
0
15
4.0
1.0
5
5
mA
µA
Min.
Typ.
Max.
Unit
Conversion speed
Fc
0.5
20
MSPS
Supply current
Reference pin current
Analog input band width
(–1dB)
Analog input capacitance
Reference resistance
(V
RT
to V
RB
)
Offset voltage
∗
1
I
DD
I
REF
BW
C
IN
R
REF
E
OT
E
OB
V
IH
V
IL
I
IH
I
IL
I
OH
I
OL
T
DL
7
4
18
4
250
–20
35
12
mA
5.7
MHz
pF
325
–40
55
V
Ω
mV
Digital input voltage
Digital input current
Digital output current
Output data delay
With TTL 1 gate and 10pF load
Ta = –20 to +75°C
V
DD
= 4.75 to 5.25V
Integral non-linearity error
Differential non-linearity
error
Differential gain error
Differential phase error
Aperture jitter
Sampling delay
E
L
E
D
DG
DP
Taj
Tsd
∗
1
The offset voltage EOB is a potential difference between VRB and a point of position where the voltage
drops equivalent to 1/2 LSB of the voltage when the output data changes from "00000000" to "00000001".
EOT is a potential difference between VRT and a potential of point where the voltage rises equivalent to
1/2 LSB of the voltage when the output data changes from "11111111" to "11111110".
–4–
CXD1172AM/AP
Electrical Characteristics Test Circuit
Integral non-linearity error
Differential non-linearity
Offset voltage
+V
}
S
2
S
1
Test Circuit
S
1
: ON
IF
A < B
S
2
: ON
IF
B > A
–V
A<B
A>B
COMPARATOR
A6
B6
to
to
A1
B1
B0
A0
V
IN
CXD1172A
6
6
BUFFER
“0”
DVM
CLK (20MHz)
“1”
6
000
…
00
to
111
…
0
CONTROLLER
Maximum operational speed
Differential gain error
Differential phase error
}
AMP
Test Circuit
2.0V
F
C
– 1kHz
S. G.
1
2
NTSC
SIGNAL
SOURCE
100
40 IRE
MODULATION
BURST
1.0V
620
TTL
FC
–5.2V
ECL
2.0V
–5.2V
CLK
1.0V
V
IN
CXD
1172A
6
TTL
ECL
6
620
10bit
D/A
2
VECTOR
SCOPE
D. G
D. P
CX20202A-1
1
ERROR RATE
H. P. F
COUNTER
IAE
0
–40
SYNC
S. G.
(CW)
Digital output current test circuit
2.0V
1.0V
V
RT
V
IN
V
RB
V
CC
I
OL
2.0V
1.0V
V
RT
V
IN
V
RB
V
CC
I
OH
CLK
GND
V
OL
+
–
CLK
GND
V
OH
+
–
–5–
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