MSP 44x8G
Contents
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Section
1.
1.1.
1.2.
1.3.
2.
2.1.
2.2.
2.2.1.
2.2.2.
2.2.3.
2.2.4.
2.2.5.
2.3.
2.4.
2.4.1.
2.5.
2.5.1.
2.5.2.
2.5.3.
2.6.
2.6.1.
2.6.2.
2.7.
2.7.1.
2.7.2.
2.8.
2.9.
2.10.
2.11.
3.
3.1.
3.1.1.
3.1.2.
3.1.3.
3.1.4.
3.1.4.1.
3.1.4.2.
3.1.4.3.
3.1.4.4.
3.2.
3.3.
3.3.1.
3.3.2.
3.3.2.1.
3.3.2.2.
Title
Introduction
Features of the MSP 44x8G Family
MSP 44x8G Version List
MSP 44x8G Versions and their Application Fields
Functional Description
Architecture of the MSP 44x8G Family
MSP 44x8G Sound IF Processing
Analog Sound IF Input
Demodulator: Standards and Features
Preprocessing of Demodulator Signals
Automatic Sound Select
Manual Mode
Preprocessing for SCART and I
2
S Input Signals
Source Selection and Output Channel Matrix
Mixing Unit
Audio Baseband Processing
Automatic Volume Correction (AVC)
Main and Aux Outputs
Quasi-Peak Detector
SCART Signal Routing
SCART DSP In and SCART Out Select
Stand-by Mode
I
2
S Bus Interfaces
Synchronous I
2
S-Interface(s)
Asynchronous I
2
S-Interface
ADR Bus Interface
Digital Control I/O Pins and Status Change Indication
Preemphasis
Clock PLL Oscillator and Crystal Specifications
Control Interface
Device and Subaddresses
Internal Hardware Error Handling
Description of CONTROL Register
Protocol Description
Proposals for General MSP 44x8G I
2
C Telegrams
Symbols
Write Telegrams
Read Telegrams
Examples
Start-Up Sequence: Power-Up and I
2
C-Controlling
MSP 44x8G Programming Interface
User Registers Overview
Description of User Registers
STANDARD SELECT Register
Refresh of STANDARD SELECT Register
DATA SHEET
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June 16, 2003; 6251-516-1DS
Micronas
DATA SHEET
MSP 44x8G
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Section
3.3.2.3.
3.3.2.4.
3.3.2.5.
3.3.2.6.
3.3.2.7.
3.4.
3.5.
3.5.1.
3.5.2.
3.5.3.
3.5.4.
3.5.5.
3.5.6.
4.
4.1.
4.2.
4.3.
4.4.
4.5.
4.6.
4.6.1.
4.6.2.
4.6.2.1.
4.6.2.2.
4.6.2.3.
4.6.2.4.
4.6.3.
4.6.3.1.
4.6.3.2.
4.6.3.3.
4.6.3.4.
4.6.3.5.
4.6.3.6.
4.6.3.7.
4.6.3.8.
4.6.3.9.
4.6.3.10.
5.
5.1.
5.2.
5.3.
5.4.
5.5.
5.6.
Title
STANDARD RESULT Register
Write Registers on I
2
C Subaddress 10
hex
Read Registers on I
2
C Subaddress 11
hex
Write Registers on I
2
C Subaddress 12
hex
Read Registers on I
2
C Subaddress 13
hex
Programming Tips
Examples of Minimum Initialization Codes
B/G-FM (A2 or NICAM)
BTSC-Stereo
BTSC-SAP with SAP at Main Channel
FM-Stereo Radio
Automatic Standard Detection
Software Flow for Interrupt driven STATUS Check
Specifications
Outline Dimensions
Pin Connections and Short Descriptions
Pin Descriptions
Pin Configurations
Pin Circuits
Electrical Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
General Recommended Operating Conditions
Analog Input and Output Recommendations
Recommendations for Analog Sound IF Input Signal
Crystal Recommendations
Characteristics
General Characteristics
Digital Inputs, Digital Outputs
Reset Input and Power-Up
I
2
C-Bus Characteristics
I
2
S-Bus Characteristics
Analog Baseband Inputs and Outputs, AGNDC
Sound IF Inputs
Power Supply Rejection
Analog Performance
Sound Standard Dependent Characteristics
Appendix A: Overview of TV-Sound Standards
NICAM 728
A2-Systems
BTSC-Sound System
Japanese FM Stereo System (EIA-J)
FM Satellite Sound
FM-Stereo Radio
Micronas
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MSP 44x8G
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Section
6.
6.1.
6.2.
6.3.
6.3.1.
6.3.1.1.
6.3.1.2.
6.3.2.
6.3.3.
6.3.4.
6.4.
6.4.1.
6.4.2.
6.4.3.
6.4.4.
6.5.
6.5.1.
6.5.2.
6.5.3.
6.5.4.
6.5.5.
6.6.
6.6.1.
6.6.2.
6.7.
6.7.1.
6.7.2.
7.
7.1.
7.2.
7.3.
8.
9.
Title
Appendix B: Manual Mode
Demodulator Write and Read Registers for Manual Mode
DSP Write and Read Registers for Manual Mode
Manual Mode: Description of Demodulator Write Registers
Automatic Switching between NICAM and Analog Sound
Function in Automatic Sound Select Mode
Function in Manual Mode
A2 Threshold
Carrier-Mute Threshold
DCO-Registers
Manual Mode: Description of Demodulator Read Registers
NICAM Mode Control/Additional Data Bits Register
Additional Data Bits Register
CIB Bits Register
NICAM Error Rate Register
Manual Mode: Description of DSP Write Registers
Additional Channel Matrix Modes
FM Fixed Deemphasis
FM Adaptive Deemphasis
NICAM Deemphasis
Identification Mode for A2 Stereo Systems
Manual Mode: Description of DSP Read Registers
Stereo Detection Register for A2 Stereo Systems
DC Level Register
Demodulator Source Channels in Manual Mode
Terrestrial Sound Standards
SAT Sound Standards
Appendix C: Application Information
Exclusions of Audio Baseband Features
Phase Relationship of Analog Outputs
Application Circuit
Appendix D: MSP 44x8G Version History
Data Sheet History
DATA SHEET
4
June 16, 2003; 6251-516-1DS
Micronas
DATA SHEET
MSP 44x8G
the reception of digital stereo signals with arbitrary
sample rates from 5 to 50 kHz. Synchronization is per-
formed by means of a high-quality adaptive sample
rate converter. All I
2
S input signals are upsampled to
48 kHz.
The MSP 44x8G offers the following automatic func-
tions:
– ASD (Automatic Standard Detection) detects the
actual broadcasted TV standard automatically.
– ASS (Automatic Sound Select) switches automati-
cally (without any I2C action) between mono/stereo/
bilingual when the broadcast mode changes.
This generation of TV sound processing ICs includes
versions for processing the multichannel television
sound (MTS) signal conforming to the U.S. standard
recommended by the Broadcast Television Systems
Committee (BTSC). The DBX noise reduction, or alter-
natively, Micronas Noise Reduction (MNR) is per-
formed alignment free. Apart from all 2-carrier stan-
dards, other processed standards are the Japanese
FM-FM multiplex standard (EIA-J) and the FM Stereo
Radio standard.
The MSP 44x8G versions are pin and software com-
patible to other MSP families. Standard selection
requires only a single I
2
C transmission.
The ICs are produced in submicron CMOS technology
and are available in the following packages:
PMQFP80-11, PMQFP64-2, and PSDIP64-1.
Multistandard Sound Processor Family
Release Note: Revision bars indicate significant
changes to the previous edition. The hardware and
software description in this document is valid for
the MSP 44x8G version B3 and following versions.
1. Introduction
The MSP 44x8G family of Multistandard Sound Pro-
cessors cover the demodulation and stereo decoding
of all analog TV-Standards worldwide, as well as the
NICAM digital sound standards and FM stereo radio.
The full demodulation and decoding, starting with ana-
log sound IF signal in, down to processed analog or
digital AF (baseband audio) out, is performed on a sin-
gle chip. Fig. 1–1 shows a simplified functional block
diagram of the MSP 44x8G.
The MSP 44x8G built-in stereo A/D converters offer a
S/N ratio of 95 dBA typ. The double stereo D/A con-
verters with analog volume and 0.125 dB steps make
use of the Micronas unique multibit Delta-Sigma tech-
nology, offering a dynamic range of 95 dBA typically.
The DSP processing is performed at a 48 kHz sample
rate, maintaining the full audio bandwidth of 20 kHz in
all MSP 44x8G signal paths.
The MSP 44x8G has been designed for the usage in
hybrid set-top boxes and multimedia applications. It
combines the function of a TV stereo decoder together
with an Audio I
2
S Codec and DSP audio processing
features. Its asynchronous I
2
S slave interface allows
Sound IF1
ADC
Sound IF2
I
2
S1
I
2
S2
I
2
S3
SCART1
SCART2
SCART3
SCART4
MONO
SCART
DSP
Input
Select
De-
modulator
Pre-
processing
Main
Sound
Processing
DAC
Main
Channel
Source Select
synchron.
I
2
S
asychron.
I
2
S
Prescale
Aux
Sound
Processing
DAC
Aux
Channel
I
2
S
DAC
SCART1
ADC
Prescale
DAC
SCART
Output
Select
SCART2
Fig. 1–1:
Simplified functional block diagram of the MSP 44x8G
Micronas
June 16, 2003; 6251-516-1DS
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