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Datasheet> 器件分类 > 分立半导体> 晶体管> CA3227E
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CA3227E

产品描述5 CHANNEL, L BAND, Si, NPN, RF SMALL SIGNAL TRANSISTOR, MS-001-BB, PLASTIC, DIP-16
产品类别分立半导体    晶体管   
文件大小63KB，共7页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 全文预览

CA3227E概述

5 CHANNEL, L BAND, Si, NPN, RF SMALL SIGNAL TRANSISTOR, MS-001-BB, PLASTIC, DIP-16

CA3227E规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Renesas(瑞萨电子)
零件包装代码DIP
包装说明PLASTIC, DIP-16
针数16
Reach Compliance Codenot_compliant
ECCN代码EAR99
最大集电极电流 (IC)0.02 A
集电极-发射极最大电压8 V
配置SEPARATE, 5 ELEMENTS
最高频带L BAND
JEDEC-95代码MS-001BB
JESD-30 代码R-PDIP-T16
JESD-609代码e0
元件数量5
端子数量16
封装主体材料PLASTIC/EPOXY
封装形状RECTANGULAR
封装形式IN-LINE
极性/信道类型NPN
认证状态Not Qualified
表面贴装NO
端子面层Tin/Lead (Sn/Pb)
端子形式THROUGH-HOLE
端子位置DUAL
晶体管应用AMPLIFIER
晶体管元件材料SILICON
标称过渡频率 (fT)3000 MHz

CA3227E文档预览

CA3227
TM
Data Sheet
May 2000
File Number
1345.5
High-Frequency NPN Transistor Array For
Low-Power Applications at Frequencies
Up to 1.5GHz
The CA3227 consists of five general purpose silicon NPN
transistors on a common monolithic substrate. Each of the
transistors exhibits a value of f
T
in excess of 3GHz, making
them useful from DC to 1.5GHz. The monolithic construction
of these devices provides close electrical and thermal
matching of the five transistors.
Features
• Gain-Bandwidth Product (f
T
) . . . . . . . . . . . . . . . . . >3GHz
• Five Transistors on a Common Substrate
Applications
• VHF Amplifiers
• VHF Mixers
• Multifunction Combinations - RF/Mixer/Oscillator
• IF Converter
• IF Amplifiers
Ordering Information
PART
NUMBER
(BRAND)
CA3227E
CA3227M
(3227)
CA3227M96
(3227)
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC Tape
and Reel
PKG. NO.
E16.3
M16.15
M16.15
• Sense Amplifiers
• Synthesizers
• Synchronous Detectors
• Cascade Amplifiers
Pinout
CA3227
(PDIP, SOIC)
TOP VIEW
1
2
3
4
SUBSTRATE 5
6
7
8
Q
3
Q
4
Q
2
Q
5
16
15
14
13
12
11
10
9
Q
1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright
©
Intersil Corporation 2000
CA3227
Absolute Maximum Ratings
Collector to Emitter Voltage (V
CEO
). . . . . . . . . . . . . . . . . . . . . . . 8V
Collector to Base Voltage (V
CBO
) . . . . . . . . . . . . . . . . . . . . . . . 12V
Collector to Substrate Voltage (V
CIO
, Note 1) . . . . . . . . . . . . . . 20V
Collector Current (I
C
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Thermal Information
Thermal Resistance (Typical, Note 2)
θ
JA
(
o
C/W)
16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
90
16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
185
Maximum Power Dissipation (Any One Transistor) . . . . . . . . 85mW
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of these devices is isolated from the substrate by an integral diode. The substrate (Terminal 5) must be connected
to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
T
A
= 25
o
C
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS FOR EACH TRANSISTOR
Collector to Base Breakdown Voltage
Collector to Emitter Breakdown Voltage
V
(BR)CBO
V
(BR)CEO
I
C
= 10µA, I
E
= 0
I
C
= 1mA, I
B
= 0
I
C1
= 10µA, I
B
= 0, I
E
= 0
V
EB
= 4.5V, I
C
= 0
V
CE
= 5V, I
B
= 0
V
CB
= 8V, I
E
= 0
V
CE
= 6V
I
C
= 10mA
I
C
= 1mA
I
C
= 0.1mA
Base to Emitter Voltage
Collector to Emitter Saturation Voltage
Base to Emitter Saturation Voltage
NOTE:
3. On small-geometry, high-frequency transistors, it is very good practice never to take the Emitter Base Junction into reverse breakdown. To do
so may permanently degrade the h
FE
. Hence, the use of I
EBO
rather than V
(BR)EBO
. These devices are also susceptible to damage by
electrostatic discharge and transients in the circuits in which they are used. Moreover, CMOS handling procedures should be employed.
V
BE
V
CE SAT
V
BE SAT
V
CE
= 6V
I
C
= 10mA, I
B
= 1mA
I
C
= 10mA, I
B
= 1mA
I
C
= 1mA
12
8
20
-
-
-
-
40
-
0.62
-
0.74
20
10
-
-
-
-
110
150
150
0.71
0.13
-
-
-
-
10
1
100
-
-
-
0.82
0.50
0.94
V
V
V
V
V
V
µA
µA
nA
Collector to Substrate Breakdown Voltage V
(BR)CIO
Emitter Cutoff Current (Note 3)
Collector Cutoff Current
Collector Cutoff Current
DC Forward Current Transfer Ratio
I
EBO
I
CEO
I
CBO
h
FE
2
CA3227
Electrical Specifications
PARAMETER
T
A
= 25
o
C, 200MHz, Common Emitter, Typical Values Intended Only for Design Guidance
SYMBOL
TEST CONDITIONS
TYPICAL
VALUES
UNITS
DYNAMIC CHARACTERISTICS FOR EACH TRANSISTOR
Input Admittance
Y
11
b
11
g
11
Output Admittance
Y
22
b
22
g
22
Forward Transfer Admittance
Y
21
Y
21
θ
21
Reverse Transfer Admittance
Y
12
Y
12
θ
12
Input Admittance
Y
11
b
11
g
11
Output Admittance
Y
22
b
22
g
22
Forward Transfer Admittance
Y
21
Y
21
θ
21
Reverse Transfer Admittance
Y
12
Y
12
θ
12
Small Signal Forward Current Transfer Ratio
h
21
I
C
= 1mA, V
CE
= 5V
I
C
= 10mA, V
CE
= 5V
TYPICAL CAPACITANCE AT 1MHz, THREE-TERMINAL MEASUREMENT
Collector to Base Capacitance
Collector to Substrate Capacitance
Collector to Emitter Capacitance
Emitter to Base Capacitance
C
CB
C
CI
C
CE
C
EB
V
CB
= 6V
V
CI
= 6V
V
CE
= 6V
V
EB
= 3V
0.3
1.6
0.4
0.75
pF
pF
pF
pF
I
C
= 10mA, V
CE
= 5V
I
C
= 10mA, V
CE
= 5V
I
C
= 10mA, V
CE
= 5V
I
C
= 10mA, V
CE
= 5V
I
C
= 1mA, V
CE
= 5V
I
C
= 1mA, V
CE
= 5V
I
C
= 1mA, V
CE
= 5V
I
C
= 1mA, V
CE
= 5V
4
0.75
2.7
0.13
29.3
-33
0.38
-97
4.8
2.85
2.75
0.9
95
-62
0.39
-97
7.1
17
mS
mS
mS
mS
mS
Degrees
mS
Degrees
mS
mS
mS
mS
mS
Degrees
mS
Degrees
Spice Model
.model NPN
+
+
+
+
+
+
+
+
(Spice 2G.6)
BF = 2.610E + 02
RC = 1.000E + 01
IK = 1.000E - 01
ISC = 9.25E - 14
CJS = 1.800E - 12
CJC = 9.100E - 13
AF = 1.000E + 00
MJS = 3.530E - 01
BR = 4.401E + 00
RE = 7.396E - 01
ISE = 1.87E - 14
NC = 1.333E + 00
CJE = 1.010E - 12
PC = 3.850E - 01
EF = 1.000E + 00
RBM = 30.00
IS = 6.930E - 16
VA = 6.300E + 01
NE = 1.653E + 00
TF = 1.775E - 11
PE = 8.350E - 01
MC = 2.740E - 01
FC = 5.000E - 01
RBV = 100
RB = 130.0E + 00
VB = 2.208E + 00
IKR = 1.000E - 02
TR = 1.000E - 09
ME = 4.460E - 01
KF = 0.000E + 00
PJS = 5.410E - 01
IRB = 0.00
Please Note: No measurements have been made to model the reverse AC operation (tr is an estimation).
3
CA3227
Typical Performance Curves
160
150
140
130
120
110
100
90
80
70
60
50
40
V
CE
= 6V, T
A
= 25
o
C
30
20
0.1
1.0
I
C
(mA)
3.5
3.0
2.5
f
T
(GHz)
2.0
1.5
1.0
0.5
0
V
CE
= 5V, T
A
= 25
o
C
h
FE
10
100
0
5
I
C
(mA)
10
15
FIGURE 1. h
FE
vs COLLECTOR CURRENT
FIGURE 2. f
T
vs COLLECTOR CURRENT
R
SOURCE
= 500Ω, V
CE
= 6V, T
A
= 25
o
C
30
NOISE FIGURE (dB)
FREQUENCY = 10Hz
NOISE FIGURE (dB)
30
R
SOURCE
= 1kΩ, V
CE
= 6V, T
A
= 25
o
C
FREQUENCY = 10Hz
20
100Hz
20
100Hz
1kHz
10
1kHz
10
10kHz
100kHz
0.01
0.1
I
C
(mA)
1.0
10.0
10kHz
100kHz
0.01
0.1
I
C
(mA)
1.0
10.0
FIGURE 3. NOISE FIGURE vs COLLECTOR CURRENT
FIGURE 4. NOISE FIGURE vs COLLECTOR CURRENT
1.75
1.50
CAPACITANCE (pF)
1.25
1.00
0.75
0.50
0.25
0
0
1
2
3
4
5
6
7
8
9
10
BIAS VOLTAGE (V)
C
CI
C
EB
C
CB
FIGURE 5. CAPACITANCE vs BIAS VOLTAGE
4
CA3227
Die Characteristics
DIE DIMENSIONS:
46 mils x 32 mils
Metallization Mask Layout
CA3227
(14)
(13)
(12)
(11)
(15)
(10)
(16)
(9)
(1)
(8)
(2)
(7)
(3)
(4)
(5)
SUBSTRATE
(6)
5
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