Datasheet> 器件分类 > 嵌入式处理器和控制器> 微控制器和处理器> CY7C63000-PC

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CY7C63000-PC: 产品描述RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小357KB，共27页; 制造商Cypress(赛普拉斯)

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CY7C63000-PC概述

RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20

CY7C63000-PC规格参数

参数名称	属性值
是否Rohs认证	不符合
厂商名称	Cypress(赛普拉斯)
零件包装代码	DIP
包装说明	0.300 INCH, PLASTIC, DIP-20
针数	20
Reach Compliance Code	not_compliant
具有ADC	NO
地址总线宽度
位大小	8
最大时钟频率	6 MHz
DAC 通道	NO
DMA 通道	NO
外部数据总线宽度
JESD-30 代码	R-PDIP-T20
JESD-609代码	e0
长度	25.527 mm
I/O 线路数量	12
端子数量	20
最高工作温度	70 °C
最低工作温度
PWM 通道	NO
封装主体材料	PLASTIC/EPOXY
封装代码	DIP
封装等效代码	DIP20,.3
封装形状	RECTANGULAR
封装形式	IN-LINE
峰值回流温度（摄氏度）	NOT SPECIFIED
电源	5 V
认证状态	Not Qualified
RAM（字节）	128
ROM（单词）	2048
ROM可编程性	OTPROM
座面最大高度	4.826 mm
速度	12 MHz
最大压摆率	50 mA
最大供电电压	5.25 V
最小供电电压	4 V
标称供电电压	5 V
表面贴装	NO
技术	CMOS
温度等级	COMMERCIAL
端子面层	Tin/Lead (Sn/Pb)
端子形式	THROUGH-HOLE
端子节距	2.54 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
宽度	7.62 mm
uPs/uCs/外围集成电路类型	MICROCONTROLLER, RISC

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1CY 7C63 00 0

fax id: 3401

PRELIMINARY

CY7C63000/CY7C63001

CY7C63100/CY7C63101

CY7C63200/CY7C63201

CY7C63000

CY7C63001

CY7C63100

CY7C63101

CY7C63200

CY7C63201

Universal Serial Bus Microcontroller

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

• CA 95134 •

408-943-2600

October 1996 - Revised June 26, 1997

PRELIMINARY

TABLE OF CONTENTS

CY7C63000/CY7C63001

CY7C63100/CY7C63101

CY7C63200/CY7C63201

1.0 FEATURES .....................................................................................................................................4

2.0 FUNCTIONAL OVERVIEW ............................................................................................................. 4

3.0 PIN DEFINITIONS ........................................................................................................................... 6

4.0 PIN DESCRIPTION ......................................................................................................................... 7

5.0 FUNCTIONAL DESCRIPTION ........................................................................................................ 7

5.1 Memory Organization .................................................................................................................... 7

5.1.1 Program Memory Organization ........................................................................................................... 7

5.1.2 Security Fuse Bit .................................................................................................................................... 7

5.1.3 Data Memory Organization ................................................................................................................... 9

5.2 I/O Register Summary ................................................................................................................... 9

5.3 Reset .............................................................................................................................................10

5.3.1 Power-On Reset (POR) ....................................................................................................................... 10

5.3.2 Watch Dog Reset (WDR) .................................................................................................................... 11

5.3.3 USB Bus Reset ................................................................................................................................... 11

5.4

5.5

5.6

5.7

5.8

On-chip Timer ..............................................................................................................................11

General Purpose I/O Ports ..........................................................................................................12

Instant-on Feature (Suspend Mode) ..........................................................................................14

XTALIN/XTALOUT ........................................................................................................................14

Interrupts ......................................................................................................................................15

5.8.1

5.8.2

5.8.3

5.8.4

5.8.5

Interrupt Latency ................................................................................................................................ 16

GPIO Interrupt ..................................................................................................................................... 16

USB Interrupt ...................................................................................................................................... 17

Timer Interrupt .................................................................................................................................... 17

Wake-up Interrupt ............................................................................................................................... 17

5.9 USB Engine ..................................................................................................................................17

5.9.1 USB Enumeration Process ................................................................................................................ 18

5.9.2 End Point 0 .......................................................................................................................................... 18

5.9.2.1 End Point 0 Receive .................................................................................................................................... 18

5.9.2.2 End Point 0 Transmit ................................................................................................................................... 18

5.9.3 End Point 1 .......................................................................................................................................... 20

5.9.3.1 End Point 1 Transmit ................................................................................................................................... 20

5.9.4 USB Status and Control ..................................................................................................................... 20

5.10 Instruction Set Summary ..........................................................................................................21

6.0 ABSOLUTE MAXIMUM RATINGS ...............................................................................................22

7.0 DC CHARACTERISTICS ..............................................................................................................22

8.0 SWITCHING CHARACTERISTICS ...............................................................................................23

9.0 ORDERING INFORMATION .........................................................................................................24

10.0 PACKAGE DIAGRAMS ..............................................................................................................25

PRELIMINARY

TABLE OF FIGURES

CY7C63000/CY7C63001

CY7C63100/CY7C63101

CY7C63200/CY7C63201

Figure 5-1. Program Memory Space ................................................................................................... 8

Figure 5-2. Data Memory Space .......................................................................................................... 9

Figure 5-3. Status and Control Register (Address 0xFF) ................................................................ 10

Figure 5-4. Watch Dog Reset (WDR) ................................................................................................. 11

Figure 5-5. Timer Register (Address 0x23)....................................................................................... 11

Figure 5-6. Timer Block Diagram....................................................................................................... 12

Figure 5-7. Port 0 Data Register (Address 0x00) ............................................................................. 12

Figure 5-8. Port 1 Data Register (Address 0x01) ............................................................................. 12

Figure 5-9. Block Diagram of an I/O Line.......................................................................................... 13

Figure 5-10. Port 0 Pull-Up Register (Address 0x08)....................................................................... 13

Figure 5-11. Port 1 Pull-Up Register (Address 0x09)....................................................................... 13

Figure 5-12. Port Isink Register for One GPIO Line......................................................................... 14

Figure 5-13. The Cext Register (Address 0x22) ............................................................................... 14

Figure 5-14. Clock Oscillator On-chip Circuit .................................................................................. 14

Figure 5-15. Global Interrupt Enable Register (Address 0x20)....................................................... 15

Figure 5-16. Interrupt Controller Logic Block Diagram ................................................................... 15

Figure 5-17. Port 0 Interrupt Enable Register (Address 0x04)........................................................ 16

Figure 5-18. Port 1 Interrupt Enable Register (Address 0x05)........................................................ 16

Figure 5-19. GPIO Interrupt Logic Block Diagram ........................................................................... 17

Figure 5-20. USB Device Address Register (Address 0x12) ........................................................... 18

Figure 5-21. USB End Point 0 RX Register (Address 0x14) ............................................................ 18

Figure 5-22. USB Engine Response to SETUP and OUT transactions on End Point 0 ................ 19

Figure 5-23. USB End Point 0 TX Configuration Register (Address 0x10) .................................... 19

Figure 5-24. USB End Point 1 TX Configuration Register (Address 0x11) .................................... 20

Figure 5-25. USB Status and Control Register (Address 0x13)...................................................... 20

Figure 8-1. Clock Timing .................................................................................................................... 24

Figure 8-2. USB Data Signal Timing.................................................................................................. 24

TABLE OF TABLES

Table 5-1.

Table 5-2.

Table 5-3.

Table 5-4.

I/O Register Summary......................................................................................................... 9

Output Control Truth Table ..............................................................................................13

Interrupt Vector Assignments..........................................................................................16

Instruction Set Map ...........................................................................................................21

PRELIMINARY

1.0

Features

CY7C63000/CY7C63001

CY7C63100/CY7C63101

CY7C63200/CY7C63201

• Low-cost solution for low-speed USB peripherals such as mouse, joystick, and gamepad

• USB Specification Compliance

— Conforms to USB 1.5 Mbps Specification, Version 1.0

— Conforms to USB HID Specification, Version 1.0

— Supports 1 device address and 2 endpoints

• 8-bit RISC microcontroller

— Harvard architecture

— 6 MHz external ceramic resonator or clock crystal

— 12 MHz internal operation

— USB optimized instruction set

• Internal memory

— 128 bytes of RAM

— 2K bytes of EPROM (CY7C63000, CY7C63100, CY7C63200)

— 4K bytes of EPROM (CY7C63001, CY7C63101, CY7C63201)

• I/O ports

— Integrated USB transceivers

— Up to 16 Schmitt trigger I/O pins with internal pull-up

— Up to 8 I/O pins with LED drive capability

— Special purpose I/O mode supports optimization of photo transistor and LED in mouse application

•

— Maskable Interrupts on all I/O pins

8-bit free-running timer

Watchdog timer (WDT)

Internal power-on reset (POR)

Improved output drivers to reduce EMI

Operating voltage from 4.0V to 5.25VDC

Operating temperature from 0 to 70 degree Celsius

Available in space saving and low cost 18-pin PDIP, 20-pin PDIP, 20-pin SOIC, and 24-pin SOIC packages

Windowed packages also available to support program development: 18, 20, and 24-pin Windowed CerDIP

Industry standard programmer support

2.0

Functional Overview

The CY7C63xxx is a family of 8-bit RISC One Time Programmable (OTP) microcontrollers with a built-in 1.5-Mbps USB serial

interface engine. The microcontroller features 35 instructions which are optimized for USB applications. There is 128 bytes of

onboard RAM available incorporated into each microcontroller. The Cypress USB Controller accepts a 6 MHz ceramic resonator

or a 6 MHz crystal as its clock source. This clock is doubled within the chip to provide a 12 MHz clock for the microprocessor.

The microcontroller features two ports of up to sixteen general purpose I/Os (GPIOs). Each GPIO pin can be used to generate

an interrupt to the microcontroller. Additionally, all pins in Port 1 are equipped with programmable drivers strong enough to drive

LEDs. The GPIO ports feature low EMI emissions as a result of controlled rise and fall times, and unique output driver circuits in

the microcontroller. The Cypress microcontrolles have a range of GPIOs to fit various applications; the CY7C630xx has twelve

GPIO, the CY7C631xx has sixteen GPIO, and the CY7C632xx has ten GPIO. Notice that each part has eight ‘low-current’ ports

(Port 0)with the remaining ports (Port 1) being ‘high-current’

The twelve GPIO CY7C6300x is available in is a 20-pin PDIP (-PC), 20-pin SOIC (-SC), and a 20-pin Windowed CerDIP. The

sixteen GPIO CY7C6310x is available in a 24-pin SOIC (-SC) and a 24-pin Windowed CerDIP (-SC). The ten GPIO CY7C6320x

is available in an 18-pin PDIP (-PC) and an 18-pin Windowed CerDIP (-WC).

CY7C63000-PC相似产品对比

	CY7C63000-PC	CY7C63101-WC	CY7C63001-SC	CY7C63001-PC	CY7C63100-SC	CY7C63000-SC	CY7C63200-PC
描述	RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20	RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, CDIP24, 0.300 INCH, WINDOWED, CERDIP-24	RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDSO20, 0.300 INCH, PLASTIC, SOIC-20	RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20	RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOIC-24	RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDSO20, 0.300 INCH, PLASTIC, SOIC-20	RISC Microcontroller, 8-Bit, OTPROM, 12MHz, CMOS, PDIP18, 0.300 INCH, PLASTIC, DIP-18
是否Rohs认证	不符合	不符合	不符合	不符合	不符合	不符合	不符合
零件包装代码	DIP	DIP	SOIC	DIP	SOIC	SOIC	DIP
包装说明	0.300 INCH, PLASTIC, DIP-20	0.300 INCH, WINDOWED, CERDIP-24	0.300 INCH, PLASTIC, SOIC-20	0.300 INCH, PLASTIC, DIP-20	0.300 INCH, PLASTIC, SOIC-24	0.300 INCH, PLASTIC, SOIC-20	0.300 INCH, PLASTIC, DIP-18
针数	20	24	20	20	24	20	18
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
具有ADC	NO	NO	NO	NO	NO	NO	NO
位大小	8	8	8	8	8	8	8
最大时钟频率	6 MHz	6 MHz	6 MHz	6 MHz	6 MHz	6 MHz	6 MHz
DAC 通道	NO	NO	NO	NO	NO	NO	NO
DMA 通道	NO	NO	NO	NO	NO	NO	NO
JESD-30 代码	R-PDIP-T20	R-CDIP-T24	R-PDSO-G20	R-PDIP-T20	R-PDSO-G24	R-PDSO-G20	R-PDIP-T18
JESD-609代码	e0	e0	e0	e0	e0	e0	e0
长度	25.527 mm	31.877 mm	12.8 mm	25.527 mm	15.4 mm	12.8 mm	22.733 mm
I/O 线路数量	12	16	12	12	16	12	10
端子数量	20	24	20	20	24	20	18
最高工作温度	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
PWM 通道	NO	NO	NO	NO	NO	NO	NO
封装主体材料	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	DIP	WDIP	SOP	DIP	SOP	SOP	DIP
封装等效代码	DIP20,.3	DIP24,.3	SOP20,.4	DIP20,.3	SOP24,.4	SOP20,.4	DIP18,.3
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	IN-LINE	IN-LINE, WINDOW	SMALL OUTLINE	IN-LINE	SMALL OUTLINE	SMALL OUTLINE	IN-LINE
峰值回流温度（摄氏度）	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
电源	5 V	5 V	5 V	5 V	5 V	5 V	5 V
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
RAM（字节）	128	128	128	128	128	128	128
ROM（单词）	2048	4096	4096	4096	2048	2048	2048
ROM可编程性	OTPROM	OTPROM	OTPROM	OTPROM	OTPROM	OTPROM	OTPROM
座面最大高度	4.826 mm	5.08 mm	2.65 mm	4.826 mm	2.65 mm	2.65 mm	4.826 mm
速度	12 MHz	12 MHz	12 MHz	12 MHz	12 MHz	12 MHz	12 MHz
最大压摆率	50 mA	25 mA	50 mA	50 mA	50 mA	50 mA	50 mA
最大供电电压	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
最小供电电压	4 V	4 V	4 V	4 V	4 V	4 V	4 V
标称供电电压	5 V	5 V	5 V	5 V	5 V	5 V	5 V
表面贴装	NO	NO	YES	NO	YES	YES	NO
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子面层	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
端子形式	THROUGH-HOLE	THROUGH-HOLE	GULL WING	THROUGH-HOLE	GULL WING	GULL WING	THROUGH-HOLE
端子节距	2.54 mm	2.54 mm	1.27 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
宽度	7.62 mm	7.62 mm	7.5 mm	7.62 mm	7.5 mm	7.5 mm	7.62 mm
uPs/uCs/外围集成电路类型	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC
厂商名称	Cypress(赛普拉斯)	Cypress(赛普拉斯)	-	Cypress(赛普拉斯)	Cypress(赛普拉斯)	Cypress(赛普拉斯)	Cypress(赛普拉斯)

CY7C63000-PC

CY7C63000-PC概述

CY7C63000-PC规格参数

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CY7C63000-PC相似产品对比

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