ULTRA-LOW PHASE-LOCKED
DIELECTRIC RESONATOR OSCILLATORS
PLDRO SERIES 6.7 – 13.4 GHz
FEATURES
•
•
•
•
•
•
•
•
L owest phase noise
Very fine frequency resolution
Reference from 5 to 100 MHz
Internal reference available
Small package
Low power consumption
100% Burn-in & Environmentally tested
Three Year Warranty
PLDRO SERIES
PARAMETERS
Output Frequency range
Output power (minimum)
Harmonics (maximum)*
Fundamentals (maximum)
Spurious (maximum)
Phase noise
Reference frequency**
Reference input power
Voltage
Voltage tolerance (maximum)
Current (maximum)
Load VSWR (maximum)
Alarm***
Connectors
RF in/out
Voltage/Alarm/Phase voltage
UNITS
GHz
dBm
dBc
dBc
dBc
dBc/Hz
MHz
dBm
VDC
VDC
mA
Fundamental
6.7 to 13.4
+13
-20
N/A
-80
See next page
5 to 100
0± 3
+5.4, +8, +12, or +15
+/- 0.2
350
2:1
TTL "high" in-lock
SMA/SMA
Solder pin feedthru
ELECT
RICAL
SPECIF
ICATIO
NS
* For better harmonic’s consult factory.
** Reference frequency above 100 MHz is available,
consult factory
*** Reverse logic available
ENVIRONMENTAL CONDITIONS
Operating temperature****.................................... -20 to +70°C
Storage temperature ............................................ -50 to +100°C
Humidity ............................................................... 95% at 40°C, noncondensing
Shock (survival).................................................... 30 g’s, 10 ms pulse
Vibration (survival) ............................................... 20 to 2000 Hz random to 4 g’s rms
Weight .................................................................. 125 grams (typical)
**** Extended temperature ranges available, consult factory.
WN-177697B 5/6/2008
ULTRA-LOW PHASE-LOCKED
DIELECTRIC RESONATOR OSCILLATORS
P LD R O
T y p ic a l P h a s e N o is e
0
-1 0
-2 0
-3 0
-4 0
-5 0
-6 0
-7 0
-8 0
-9 0
-1 0 0
-1 1 0
-1 2 0
-1 3 0
-1 4 0
-1 5 0
-1 6 0
-1 7 0
10
100
1000
10000
100000
1000000
Phase Noise dBc/Hz
F r e q u e n c y O ffs e t fr o m C a r r ie r (H Z )
P L D R O -0 1 0 -0 6 9 5 0 -4 -1 2 P
P L D R O -0 1 0 -1 2 9 5 0 -1 2 P
Maximum Phase Noise Data
PLDRO FUNDAMENTAL
Phase Noise @
10Hz
100Hz
1KHz
10KHz
100KHz
1MHz
6.7GHz – 8.0GHz
8.0GHz – 11.5GHz
11.5GHz –13.4GHz
-53dBc/Hz
-76dBc/Hz
-110dBc/Hz
-117dBc/Hz
-120dBc/Hz
-143dBc/Hz
-48dBc/Hz
-73dBc/Hz
-108dBc/Hz
-115dBc/Hz
-118dBc/Hz
-141dBc/Hz
-48dBc/Hz
-72dBc/Hz
-105dBc/Hz
-106dBc/Hz
-106dBc/Hz
-130dBc/Hz
ORDERING INFORMATION
External Reference Option:
PLDRO
-
External Reference
Frequency (MHz)
-
Output Frequency
(MHz)
-
ALARM
-
D.C. Supply
(+volts)
P
Internal Reference Option:
PLDRO
-
I
-
Output Frequency
(MHz)
-
ALARM
-
D.C. Supply
(+volts)
P
ALARM:
3. TTL; Low in Lock, High out of Lock
4. TTL; High in Lock, Low out of Lock
WN-177697B 5/6/2008
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