Hitachi 16-Bit Single-Chip Microcomputer
H8S/2319, H8S/2318 Series,
H8S/2319 F-ZTAT™,
H8S/2318 F-ZTAT™,
H8S/2315 F-ZTAT™
H8S/2319
H8S/2318
H8S/2317
H8S/2316
H8S/2315
H8S/2313
H8S/2312
H8S/2311
H8S/2310
HD64F2319
HD6432318, HD64F2318
HD6432317
HD6432316
HD64F2315
HD6432313
HD6412312
HD6432311
HD6412310
Reference Manual
— Individual Product Specifications —
ADE-602-188A
Rev. 2.0
8/24/00
Hitachi, Ltd.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Main Revisions and Additions in this Edition
Page
All
Item
Whole sections
Revisions (See Manual for Details)
Amendment due to the addition of the H8S/2319
F-ZTAT, H8S/2315 F-ZTAT, H8S/2316, and
H8S/2313 to the product lineup.
Table 1.1 Overview
The product lineup added.
Figure 1.1 Block Diagram
Note 1 amended due to the addition of
WDTOVF
(FWE, EMLE).
Figure 1.2 Pin Arrangement
Note amended due to the addition of
WDTOVF
(FWE, EMLE).
Figure 1.3 Pin Arrangement
Note amended due to the addition of
WDTOVF
(FWE, EMLE).
1.4 Pin Functions in Each
Operating Mode
Table 1.2 Pin Functions in Each Operating Mode
Functions for pins 32 to 39, 41 to 48, and 50 to 52
(TFP-100B) in flash memory programmer mode
amended.
Function for pin 60 (TFP-100B) amended
Note 3 amended.
1.5 Pin Functions
Table 1.3 Pin Functions
EMLE pin added.
Note 4 added.
1.6 Product Lineup
2.5 Memory Map in Each
Operating Mode
Note 2 added.
Figure 2.1 H8S/2319 F-ZTAT Memory Map in
Each Operating Mode added.
Figures 2.2, 2.3, and 2.7 Memory Map in Each
Operating Mode
Note on reserved area added.
Figure 2.4 H8S/2316 Memory Map in Each
Operating Mode added.
Figure 2.5 H8S/2315 F-ZTAT Memory Map in
Each Operating Mode added.
Figure 2.6 H8S/2313 Memory Map in Each
Operating Mode added.
2.6 H8S/2318 Series Operating
Modes (F-ZTAT Version)
Deleted (see the hardware manual).
5
6
1.1 Overview
1.2 Block Diagram
7
1.3 Pin Arrangement
8
10
12
15
19
20
32
33 to 36,
42
37
38 to 40
41
—
Page
51
Item
3.3.3 Interrupt Exception Vector
Table
Revisions (See Manual for Details)
Table 3.3 Interrupt Sources, Vector Addresses,
and Interrupt Priorities
Names for SCI interrupts RXI0 and RXI1
amended.
Table 3.8 Interrupt Response Times
Number of wait states until execution instruction
ends amended.
Description of bit 5
H8S/2319, H8S/2316, H8S/2315, and H8S/2313
added
Table 5.23 I/O Port States in Each Processing
State
LWROD and DAOEn added to Legend.
Figure 5.35(a) Port G Block Diagram (Pin PG0)
Amended.
Amended due to the addition of the H8S/2319 F-
ZTAT to the product lineup.
Table 7.8 A/D Conversion Characteristics
Nonlinearity error, offset error, full-scale error,
quantization error, and absolute accuracy
amended.
Added.
54
3.5 Interrupt Response Times
73
4.2.5 Bus Control Register L
(BCRL)
5.13 Pin States
177
200
225
252
5.14.11 Port G
6.11 ROM
7.1.4 A/D Conversion
Characteristics
254 to
262
7.2 Electrical Characteristics of
Mask ROM Version (H8S/2318,
H8S/2317) in Low-Voltage
Operation
7.3 Electrical Characteristics of
F-ZTAT Version (H8S/2318)
7.3.2 DC Characteristics
263
Table 7.19 Absolute Maximum Ratings
Conditions A and B added.
Note amended.
Tables 7.20 (a) and (b) DC Characteristics
Maximum value of input leakage current, typical
and maximum values of current dissipation, typical
and maximum values of analog power supply
voltage, typical and maximum values of reference
power supply voltage, and equation in note 4
amended.
Table 7.25 Timing of On-Chip Supporting
Modules
WDT overflow output delay time deleted.
Table 7.26 A/D Conversion Characteristics
Nonlinearity error, offset error, full-scale error,
quantization error, and absolute accuracy
amended.
264 to
267
—
7.3.3 AC Characteristics
275
7.3.4 A/D Conversion
Characteristics
Page
277 to
280
281 to
298
—
Item
7.3.6 Flash Memory
Characteristics
7.4 Electrical Characteristics of
F-ZTAT Version (H8S/2315)
Revisions (See Manual for Details)
Tables 7.28 (a) and (b) Flash Memory
Characteristics
Completely replaced.
Added.
7.3.1 Notes when Converting the F-ZTAT
Application Software to the Mask-ROM Versions
(in the 1st Edition)
Deleted (see the hardware manual).
305
8.1 List of Registers (Address
Order)
H'FFC8: FLMCR1
H'FFC9: FLMCR2
H'FFCB: EBR2
Amended.
H'FED5: BCRL
Description of bit 5 amended.
H'FF37: DTVECR
Description of bit 7 amended.
H'FFC8: FLMCR1
Amended.
H'FFC9: FLMCR2
Amended.
H'FFCB: EBR2
Amended.
345
351
402, 403
404, 405
406
8.3 Functions
嵌入式系统
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