74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
Rev. 1 — 7 August 2012
Product data sheet
1. General description
The 74HC366-Q100; 74HCT366-Q100 is a hex inverter/line driver with 3-state outputs
controlled by the output enable inputs (OEn). A HIGH on OEn causes the outputs to
assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use
of current limiting resistors to interface inputs to voltages in excess of V
CC
.
The 74HC366-Q100; 74HCT366-Q100 is functionally identical to:
•
74HC365-Q100; 74HCT365-Q100, but has inverted outputs
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Inverting outputs
Input levels:
For 74HC366-Q100: CMOS level
For 74HC366-Q100: TTL level
Complies with JEDEC standard no. 7A
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options
NXP Semiconductors
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74HC366-Q100
74HC366D-Q100
74HC366PW-Q100
74HCT366-Q100
74HCT366D-Q100
74HCT366PW-Q100
40 C
to +125
C
40 C
to +125
C
SO16
plastic small outline package; 16 leads; body width
3.9 mm
SOT109-1
SOT403-1
40 C
to +125
C
40 C
to +125
C
SO16
plastic small outline package; 16 leads; body width
3.9 mm
SOT109-1
SOT403-1
Description
Version
Type number
TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
4. Functional diagram
2
1A
1Y
3
1A
5
2A
7
3A
9
4A
11
5A
13
6A
6Y
5Y
4Y
2
4
6
10
12
OE1
14
001aaf581
4
2A
2Y
1Y
6
3A
3Y
2Y
1
15
&
EN
10
4A
5A
4Y
5Y
3Y
12
3
5
7
9
11
13
001aaf582
14
6A
6Y
1
15
OE1
OE2
001aaf583
OE2
Fig 1.
Functional diagram
Fig 2.
Logic symbol
Fig 3.
IEC logic symbol
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
2 of 19
NXP Semiconductors
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
buffer/line driver 1
1A
V
CC
1Y
OE1
OE2
2A
GND
buffer/line driver 2
buffer/line driver 3
buffer/line driver 4
buffer/line driver 5
buffer/line driver 6
001aaf584
2Y
3A
3Y
4A
4Y
5A
5Y
6A
6Y
Fig 4.
Logic diagram
5. Pinning information
5.1 Pinning
+&4
+&74
2(
$
<
$
<
$
<
*1'
DDD
9
&&
2(
$
<
$
<
$
<
Fig 5.
Pin configuration
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
3 of 19
NXP Semiconductors
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
5.2 Pin description
Table 2.
Symbol
OE1
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
5A
6Y
6A
OE2
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
output enable input 1 (active LOW)
data input 1
data output 1
data input 2
data output 2
data input 3
data output 3
ground (0 V)
data output 4
data input 4
data output 5
data input 5
data output 6
data input 6
output enable input 2 (active LOW)
supply voltage
6. Functional description
Table 3.
Control
OE1
L
L
X
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Function table
[1]
Input
OE2
L
L
H
X
nA
L
H
X
X
Output
nY
H
L
Z
Z
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
4 of 19
NXP Semiconductors
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
SO16 package
TSSOP16 package
[1]
[2]
For SO16 packages: P
tot
derates linearly with 8 mW/K above 70
C.
For TSSOP16 packages: P
tot
derates linearly with 5.5 mW/K above 60
C.
[1]
[2]
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to (V
CC
+ 0.5 V)
Min
0.5
-
-
-
-
-
65
-
-
Max
+7
20
20
35
70
70
+150
500
500
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC366-Q100
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
74HCT366-Q100
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
5 of 19
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