74HC157-Q100; 74HCT157-Q100
Quad 2-input multiplexer
Rev. 1 — 2 August 2012
Product data sheet
1. General description
The 74HC157-Q100; 74HCT157-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT157-Q100 are quad 2-input multiplexers which select 4 bits of data from
two sources under the control of a common data select input (S). The enable input (E) is
active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of
all other input conditions.
Moving the data from two groups of registers to four common output buses is a common
use of the 74HC/HCT157-Q100. The state of the common data select input (S)
determines the particular register from which the data comes. It can also be used as
function generator. The device is useful for implementing highly irregular logic by
generating any four of the 16 different functions of two variables with one variable
common. The 74HC/HCT157-Q100 is logic implementation of a 4-pole, 2-position switch,
where the position of the switch is determined by the logic levels applied to S.
The logic equations are:
1Y = E (1I1 S + 1I0 S)
2Y = E (2I1 S + 2I0 S)
3Y = E (3I1 S + 3I0 S)
4Y = E (4I1 S + 4I0 S)
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Low-power dissipation
Non-inverting data path
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options
NXP Semiconductors
74HC157-Q100; 74HCT157-Q100
Quad 2-input multiplexer
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC157D-Q100
74HCT157D-Q100
74HC157PW-Q100
74HCT157PW-Q100
74HC157BQ-Q100
74HCT157BQ-Q100
40 C
to +125
C
40 C
to +125
C
TSSOP16
40 C
to +125
C
Name
SO16
Description
Version
plastic small outline package; 16 leads; body width SOT109-1
3.9 mm
plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
Type number
DHVQFN16 plastic dual in-line compatible thermal enhanced
SOT763-1
very thin quad flat package; no leads; 16 terminals;
body 2.5
3.5
0.85 mm
4. Functional diagram
S
E
1I1
1Y
1I0
2I1
2Y
2I0
2
3Y
1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1
3I0
1
15
4I1
4Y
4I0
mna484
3I1
3
5
6
11
10
14
13
S
E
1Y
4
2Y
7
3Y
9
4Y
12
mna481
Fig 1. Logic diagram
Fig 2. logic symbol
74HC_HCT157_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 2 August 2012
2 of 17
NXP Semiconductors
74HC157-Q100; 74HCT157-Q100
Quad 2-input multiplexer
1
2
3
5
6
11
10
14
13
1I0
1I1
2I0
2Y
2I1
3I0
3I1
4I0
4I1
4Y 12
SELECTOR
MULTIPLEXER
OUTPUTS
7
1Y
4
15
G1
EN
2
3
1
1
MUX
4
3Y
9
5
6
11
10
14
7
9
S
1
E
15
mna483
13
mna482
12
Fig 3. Logic symbol
Fig 4. IEC logic symbol
5. Pinning information
5.1 Pinning
+&4
+&74
+&4
+&74
6
,
,
<
,
,
<
*1'
DDD
WHUPLQDO
LQGH[ DUHD
,
9
&&
(
,
,
<
,
,
<
*1'
<
*1'
9
&&
(
,
,
<
,
,
,
<
,
,
<
6
DDD
7UDQVSDUHQW WRS YLHZ
(1) This is not a supply pin. The substrate is attached to
this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder
this pad. However, if it is soldered, the solder land
should remain floating or be connected to GND.
Fig 5. Pin configuration SO16, TSSOP16
Fig 6. Pin configuration DHVQFN16
74HC_HCT157_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 2 August 2012
3 of 17
NXP Semiconductors
74HC157-Q100; 74HCT157-Q100
Quad 2-input multiplexer
5.2 Pin description
Table 2.
Symbol
S
1I0 to 4I0
1I1 to 4I1
1Y to 4Y
GND
E
V
CC
Pin description
Pin
1
2, 5, 11, 14
3, 6, 10, 13
4, 7, 9, 12
8
15
16
Description
common data select input
data inputs from source 0
data inputs from source 1
multiplexer outputs
ground (0 V)
enable input (active LOW)
supply voltage
6. Functional description
Table 3.
Input
E
H
L
L
L
L
[1]
Function table
[1]
Output
S
X
L
L
H
H
nI0
X
L
H
X
X
nI1
X
X
X
L
H
nY
L
L
H
L
H
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
SO16 package
TSSOP16 package
DHVQFN16 package
[1]
[2]
P
tot
derates linearly with 8 mW/K above 70
C.
P
tot
derates linearly with 5.5 mW/K above 60
C.
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to (V
CC
+ 0.5 V)
Min
0.5
-
-
-
-
-
65
Max
+7
20
20
25
+50
50
+150
500
500
500
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
mW
T
amb
=
40 C
to +125
C
[1]
[2]
[3]
-
-
-
74HC_HCT157_Q100
Product data sheet
Rev. 1 — 2 August 2012
4 of 17
NXP Semiconductors
74HC157-Q100; 74HCT157-Q100
Quad 2-input multiplexer
[3]
P
tot
derates linearly with 4.5 mW/K above 60
C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC157-Q100
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
74HCT157-Q100
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
T
amb
= 25
C
Min
74HC157-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
4.0
mA; V
CC
= 4.5 V
I
O
=
5.2
mA; V
CC
= 6.0 V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
O
= 5.2 mA; V
CC
= 6.0 V
I
I
input leakage
current
V
I
= V
CC
or GND;
V
CC
= 6.0 V
-
-
-
-
-
-
0
0
0
0.15
0.16
-
0.1
0.1
0.1
0.26
0.26
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
1.0
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1.0
V
V
V
V
V
A
1.9
4.4
5.9
3.98
5.48
2.0
4.5
6.0
4.32
5.81
-
-
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
1.5
3.15
4.2
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
Typ
Max
T
amb
=
40 C
to
+85
C
Min
Max
T
amb
=
40 C
to Unit
+125
C
Min
Max
74HC_HCT157_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 2 August 2012
5 of 17
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