Si9730
Vishay Siliconix
Dual-Cell Lithium Ion Battery Control IC
FEATURES
D
D
D
D
D
D
Over-Charge Protection
Over-Discharge Protection
Short Circuit Current Limiting
Battery Open-Circuit Center Tap Protection
Cell Voltage Balancing
Undervoltage Lockout
D
D
D
D
D
D
Individual Cell Voltage Monitoring
Low Operating Current (30
mA)
and Shutdown Current (1
mA)
Internal N-Channel MOSFET Driver
High Noise Immunity
Accurate ("1.19%) Over-Charge Voltage Detection
Four Different Cell Types Covered
DESCRIPTION
The Si9730 monitors the charging and discharging of dual-cell
lithium-ion battery packs (carbon or coke chemistry) ensuring
that battery capacity is fully utilized while ensuring safe
operation.
The Si9730 provides protection against
overcharge, over-discharge, and short circuit conditions which
are hazardous to the battery and the environment.
Battery voltages of each individual cell are monitored at the
center-tap connection by an internal A/D converter through the
V
C
pin. If one or both of the cells is determined to be
overcharged, an internal cell balancing network
“bleeds”
off
current at 15
mA
until both cells are charged to the same
maximum level. Depending on the condition of each cell, the
Si9730 will switch two external source-connected n-channel
MOSFETs on or off to allow the cells to be charged or to
provide current to the load.
The Si9730 is available in an 8-pin SOIC package with an
operating temperature range of –25 to 85°C.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
C
V
DD
Undervoltage
Lockout
+
V
C1
–
Cell Balancing
Network
V
C
A/D
Converter
OUT
Control
Logic
Timer
C
DELAY
Time Out
CLK
+
V
C2
–
Oscillator
1.2 V
REF
V
SS
S
OUT
V
SS
DCO
I
LIMIT
V
M
GS Generator
I
S
V
M
Document Number: 70658
S-20864—Rev. E, 03-Jun-02
www.vishay.com
1
Si9730
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V
M
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DD
–15 V to V
DD
+15 V
V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
–0.3 V to V
SS
+12 V
V
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
–0.3 V to V
DD
+0.3 V
I
S
(V
SS
w
V
M
) . . . . . . . . . . . . . . . . . . . . . . . . . . . V
M
–0.3 V to V
DD
+0.3 V
(V
M
w
V
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
–0.3 V to V
DD
+0.3 V
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . 125_C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mW
Thermal Impedance (P
QJA
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80_C/W
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
Stresses beyond those listed under
“Absolute
Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
C
VC
t10
pF from V
C
toV
DD
andV
SS
, Total
C
D
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open to 1.0
mF
R
IS
series resistance to sense resistor . . . . . . . . . . . . . . . . . . . . . . . . .
t27
kW
DCO Load Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 2000 pF
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 V
V
DD
to V
M
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . –25 to 85_C
SPECIFICATIONS
Limits
Parameter
Power Supply
Supply Current, Charging Operation
Supply Current, Normal Operation
Undervoltage Lockout Threshold
V
M
Leakage Current
V
M
Operating Current
I
DD_C
I
DD
I
DD_UVL
V
UVL
I
VM_UVL
I
VM
V
C1
= V
C2
= 2.6 V, V
DD
– V
M
= 8.4 V
V
C1
= V
C2
= 4.05 V, V
M
= V
SS
V
M
= V
DD
,V
C1
= V
C2
= 1.7 V
Measured at V
DD
– V
SS
(Falling)
V
C1
= V
C2
, V
DD
– V
M
= 5.5 V
V
C1
= V
C2
= 1.7 V, V
DD
= V
M
V
C1
= V
C2
= 2.6 V, V
DD
– V
M
= 8.4 V
3.5
3.7
60
30
1
4.0
1
30
V
m
mA
mA
Symbol
Test Condition
Unless Otherwise Specified
T
A
= –25 to 85_C
Min
a
Typ
b
Max
a
Unit
Control Logic
DCO Output High Voltage
DCO Rise Time (10% to 80%)
DCO Fall Time (80% to 10%)
V
OH
t
r
t
f
I
OH
= –10
mA,
V
C1
= V
C2
= 3.3 V
V
DD
– V
M
= 6.6 V
V
C1
= 2 V, V
C2
= 2.4 V
V
DD
– V
M
= 8.4 V C
L
= 500 pF, DCO to V
SS
V
M
= V
DD
V
C1
= 2 V, V
C2
= 2.4 V
V
M
= V
SS
V
C1
= V
C2
= 4.4 V, I
S
= V
DD
V
DD
– 0.1
7.5
1
V
SS
+0.4
V
V
M
+0.52
V
m
ms
DCO Output Low Voltage
V
OL
I
OL
= 10
m
mA
Analog Section
Current-Limit Comparator Trip Point
Current-Limit
Comparator Temperature Coefficient
Current-Limit
Comparator Response Time
Current Limit Comparator
Input Bias Current
www.vishay.com
V
ILIMIT
dV
ILIMIT
/dT
t
ILIMIT
I
IS
V
C1
= V
C2
=3.3 V, V
M
= V
SS
+ 0.25 V
C
L
= 50 pF, DCO to V
SS,
See Figure 2
V
C1
= V
C2
=3.3 V, V
DD
= V
M,
V
IS = VSS
–125
V
C1
= V
C2
=4.05 V, V
M
= V
SS
+ 0.25 V
I
S
Rising, T
A
= 25_C
25.5
28
0.18
25
32
mV
%/_C
ms
nA
2
Document Number: 70658
S-20864—Rev. E, 03-Jun-02
Si9730
Vishay Siliconix
SPECIFICATIONS
Limits
Parameter
Analog Section (cont’d)
T
A
= 25_C
V
OC1
Cell 1
A
Suffix
V
OC2
Cell 2
V
C1
= 4.05 V
V
DD
– V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
– V
M
= 8.6 V
T
A
= –25_C
T
A
= 85_C
T
A
= 25_C
T
A
= –25_C
T
A
= 85_C
T
A
= 25_C
V
OC1
Cell 1
B
Suffix
V
OC2
Cell 2
Over-Charge
Detect Threshold (Rising)
V
OC1
Cell 1
C
Suffix
V
OC2
Cell 2
V
C1
= 4.05 V
V
DD
– V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
– V
M
= 8.6 V
V
C1
= 4.05 V
V
DD
– V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
– V
M
= 8.6 V
T
A
= –25_C
T
A
= 85_C
T
A
= 25_C
T
A
= –25_C
T
A
= 85_C
T
A
= 25_C
T
A
= –25_C
T
A
= 85_C
T
A
= 25_C
T
A
= –25_C
T
A
= 85_C
T
A
= 25_C
V
OC1
Cell 1
D
Suffix
V
OC2
Cell 2
Over-Charge Threshold Difference
Over-Charge Detect Threshold
Hysteresis
c
Over-Discharge
Detect Threshold (Falling)
Cell Balancing Current
Timer Charge Current
Timer Discharge Current
DL2 Time (Over-Charge)
DL2 Time (Over-Discharge)
External Short Circuit Sense Current
Reset Threshold
Center Tap, Average Bias Current
Overcharge Load Detect
Power-Down Charger Detect Threshold
DCO Pulse Width
Cell 1
Cell 2
Cell 1
Cell 2
Cell 1
Cell 2
V
OC1
– V
OC2
V
OC_H1
V
OC_H2
V
ODC1
V
ODC2
I
BAL1
I
BAL2
I
TIMER(C)
I
TIMER(D)
t
DL2OC
t
DL2ODC
I
VMSHORT
V
RTH
I
VC
t
OCC
V
CHPD
t
PW
V
M
= V
SS
V
DD
– V
M
= 8.6 V
V
C2
= 4.05 V
V
C1
= 4.05 V
V
C2
= 2.6 V
V
C1
= 2.6 V
V
C1
= 4.4 V, V
C2
= 4.05 V
V
C2
= 4.4 V, V
C1
= 4.05 V
V
C2
= 3.3 V, V
M
= V
SS
V
C
= V
SS
, T
A
= 25_C
V
C1
= V
C2
= 3.3 V, V
DD
= V
M
V
DD
– V
C
= 6.1 V, T
A
= 25_C
V
C1
= 4.05 V, V
DD
– V
M
= 10 V
C
D
= 500 pF, T
A
= 25_C, See Figure 4
V
C1
= 2.6 V, V
M
= V
SS,
C
D
= 500 pF
T
A
= 25_C, See Figure 5
V
C1
= V
C2
= 4.4 V, V
M
= V
DD
V
C1
= V
C2
= 4.05 V, See Figure 3
V
C1
= V
C2
= 4.05 V, V
M
= V
DD
V
C1
= V
C2
= 4.4 V, C
D
= 500 pF
C
L
= 500 pF, DCO to V
SS,
See Figure 1
V
C1
= 2 V, V
C2
= 2.4 V, See Figure 6
C
L
= 500 pF, DCO to V
SS,
See Figure 7
520
27
27
30
42
–2
60
2.1
2.1
9
9
2.2
2.2
15
15
–0.5
1.0
40
40
60
ms
60
300
100
2
40
1.1
mA
mV
mA
ms
V
ms
mA
V
C1
= 4.05 V
V
DD
– V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
– V
M
= 8.6 V
T
A
= –25_C
T
A
= 85_C
T
A
= 25_C
T
A
= –25_C
T
A
= 85_C
4.15
4.1
4.1
4.15
4.1
4.1
4.2
4.15
4.15
4.2
4.15
4.15
4.18
4.12
4.12
4.18
4.12
4.12
4.28
4.22
4.22
4.28
4.22
4.22
4.32
4.32
4.22
4.22
4.25
4.25
4.20
4.20
4.25
4.27
4.27
4.25
4.27
4.27
4.30
4.32
4.32
4.30
4.32
4.32
4.25
4.30
4.25
4.25
4.30
4.25
4.35
4.40
4.35
4.35
4.40
4.35
20
10
10
2.3
2.3
30
30
mA
m
V
mV
V
Symbol
Test Condition
Unless Otherwise Specified
T
A
= –25 to 85_C
Min
a
Typ
b
Max
a
Unit
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. Guaranteed by design, not subject to production test.
Document Number: 70658
S-20864—Rev. E, 03-Jun-02
www.vishay.com
3
Si9730
Vishay Siliconix
TIMING DIAGRAMS
200 mV
V
M
Waveform
50%
V
SS
t
r
x
100 nS
High
DCO Waveform
V
SS
t
OCC
50%
FIGURE 1.
OC Load Detect
I
S
Input
50%
V
SS
V
DD
DCO Waveform
V
SS
50%
t
ILIMIT
60 mV
t
r
x
100 nS
V
M
Waveform
(After Short is
Removed)
V
DD
V
SS
V
RTH
V
DD
DCO Waveform
V
SS
V
RTH
= V
M
– V
SS
at DCO Transition
FIGURE 2.
Current-Limit Comparator Response Time
FIGURE 3.
Reset Threshold
4.4 V
V
C2
Waveform
4.0 V
t
30
C Waveform
V
SS
t
DL20C
+
32
30
t
30
1
31
2.6 V
V
C2
Waveform
2.0 V
t
30
C Waveform
V
SS
t
DL20DC
+
32
30
t
30
1
31
FIGURE 4.
DL2 Time (Over-Charge)
FIGURE 5.
DL2 Time (Over-Discharge)
V
SS
V
M
Waveform
+
V
CHPD
–
V
M
Waveform
High
V
SS
^V
RTH
DCO Waveform
Low
DCO Waveform
V
CHPD
= V
SS
– V
M
at DCO Transition
t
pw
V
DD
V
SS
FIGURE 6.
Power-Down Charger Detect Threshold
FIGURE 7.
Load Detection in Overcharge Mode
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4
Document Number: 70658
S-20864—Rev. E, 03-Jun-02
Si9730
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
DL2 Period (Over Charge) vs. Capacitance
100.0
25_C
25_C
t DL20C – Time (s)
10.0
t DL20DC– Time (s)
T
A
= 85_C
–25_C
10.0
T
A
= 85_C
–25_C
100.0
DL2 Period (Over Discharge) vs. Capacitance
1.0
1.0
0.1
0.01
0.1
C
D
- Capacitance (mF)
1
0.1
0.01
0.1
C
D
- Capacitance (mF)
1
Over Current Sense Voltage
vs. Current Sense Time
120
1.08
1.06
V RTH – Threshold (Normalized)
1.04
1.02
1.00
0.98
0.96
0.94
–25
Reset Threshold vs. Temperature
100
t ILIMIT (
m
S)
80
60
40
20
0
20
40
60
V
IS
– V
SS
(mV)
80
100
0
25
50
75
100
Temperature (_C)
6.5
Load Detect Time vs. V
M
– V
SS
Overcharge Threshold
vs. Opposing Cell Voltage
4.2050
OCC (V)
Overcharge Threshold V
50
75
100
125
150
175
200
6.0
4.2025
5.5
t OCC (
m
s)
5.0
4.2000
4.5
4.1975
4.0
3.5
4.1950
2.5
3.0
3.5
4.0
V
M
– V
SS
(mV)
Opposing Cell Voltage (V)
Document Number: 70658
S-20864—Rev. E, 03-Jun-02
www.vishay.com
5
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