NJU7380
STEPPER MOTOR CONTROLLER
s
GENERAL DESCRIPTION
NJU7380 is a controller with transrator which convert
from input step and direction pulse to driver's phase signal
for full and half step.
NJU7380 translates from pulse input signal (Serial
interface) to phase signal input, so NJM3700 series dual
channel bipolar drivers or NJM2672 dual H-bridge driver
can be easily controlled by a micro processor .
NJU7380 is also including Auto Current Down (ACD)
circuit which is suitable for reducing power dissipation of
power devices and motor.
s
PACKAGE OUTLINE
NJU7380E
s
FEATURES
•
Operating Voltage V
DD
=4.75
∼
5.25V
•
Absolute Maximum Voltage 7V
•
Half -step and Full - step Operation
•
Internal Phase Logic
•
Phase
Logic Reset Terminal(RESET)
•
Internal Auto Current Down Function
•
Specially matched to NJM3775,NJM3777 and NJM2672.
•
C-MOS Technology
•
Package Outline EMP14
s
PIN CONFIGURATIONS
1
2
3
14
13
12
11
4
5
6
7
10
9
8
1. DIR
2. STEP
3. HSM
4. RESET
5. Ct
6. SGND
7. PGND
8. MO
9. ACD
10. Dis2
11. Dis1
12. PB
13. PA
14. V
DD
Fig. 1Pin
Configurations
-1-
NJU7380
s
BLOCK DIAGLAM
V
DD
POR
PA
STEP
DIR
HSM
RESET
Phase Logic
&
ACD Logic
PB
Dis1
Dis2
Ct
SGND
ACD
MO
PGND
Fig.2 Block Diagram
s
PIN DESCRIPTION
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin name
DIR
STEP
HSM
RESET
MO
Ct
SGND
PGND
ACD
DIS2
DIS1
P2
P1
V
DD
Description
Direction command input for determining motor turning direction
Motor steeping pulse input, phase logic operation triggered by negative edge of
STEP signal
Half/Full step mode switching input
H level in full step mode and L level in half step mode
Phase logic initial input
Phase output initial status detection output
A value of connected capacitor determines lock detection time (Ton) and auto
resume time (Toff)
SGND (Logic GND) and PGND (Analog GND) is not connect in the IC
SGND and PGND pins should be connected ground respectively.
Auto Current Down output terminal
L level in active
Step sequence output terminals
P1/DIS1(P2/DIS2) determine a sequence output on Phase1(2) for driver IC
P1(P2) determine a motor current direction on Phase1(2) for driver IC
DIS1(DIS2) determine a phase current OFF mode at the half-step
Logic power supply voltage terminal
-2-
NJU7380
s
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATINGS
Supply Voltage
Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Power Dissipation
+7.0
-0.3
∼
V
DD
+0.3
10
-40
∼
85
-40
∼
+125
300
(Ta=25°C)
NOTE
SYMBOL [unit]
V
DD
[V]
V
ID
[V]
I
O
[mA]
T
OPR
[°C]
T
STG
[°C]
P
D
[mW]
Device itself
s
RECOMMENDED OPERATING CONDITIONS
V
DD
=4.75V∼5.25V
s
ELECTRICAL CHARACTERISTICS
PARAMETER
SYSMBOL
Operating Current
H Level Input Voltage
L Level Input Voltage
H Level Input Current
L Level Input Current
Phase Output
Saturation Voltage
DIS Output
Saturation Voltage
VR Detection Voltage
MO Output Saturation
Voltage
Output Leak Current
Power Down ON
Time
Turn ON Time
Turn OFF Time
Set-up Time
Step-pulse
Continuation Time
I
DD
V
IH
V
IL
I
IH
I
IL
V
P
V
DIS
V
VR
V
MO
I
LEAK
T
ON
T
DON
T
DOFF
T
S
V
SPC
(V
+
=5V, Ta=25°C)
TYP.
MAX.
UNIT
3.0
-
-
100
-100
-
-
-
-
-
200
-
-
-
-
4.0
-
1.5
150
-150
0.5
0.5
0.5
0.5
1
260
3
3
-
-
mA
V
V
µA
µA
V
V
V
V
µA
ms
µs
µs
ns
ns
CONDITION
-
-
-
-
-
I
P
=5mA
I
DIS
=5mA
I
MO
=5mA
I
MO
=5mA
V
DD
=7V
C
T
=0.1µF
-
-
-
-
MIN.
-
3.5
-
-
-
-
-
-
-
-
140
-
-
400
800
-3-
NJU7380
s
APPLACATION INFORMATION
V
CC
（+5V）
R
1
R
3
14
STEP
Direction
Half／Full Step
RESET
2
1
3
4
5
V
DD
SETP
DIR
HSM
9
ACD
13
PA
11
Dis1
12
10
MO
+5V
R
2
GND(V
CC
)
4×10kΩ
9
Phase1
12
4
19
V
CC
V
MM1
V
MM1
M
A1
M
B1
10kΩ
+
10µF
V
MM
4.7µF
0.1µF
3
1
NJU
7380
10 Dis1
7 VR1
14
Phase2
RESET
Ct
SGND
6
PGND
7
NJM3775
M
A2
M
B1
C
1
RC GND E
1
5,6,
11
8
2
17,18
R
S
0.47Ω
R
S
0.47Ω
E
2
C
2
15 21
PB
Dis2
20
22
STEPPER
MOTOR
Pin number refer
to DIP package
GND(V
MM
)
MO 8
12 Dis2
16 VR2
12kΩ
4700pF
Fig.3 Typical stepper motor driver application with NJM3775.
s
FUNCTIONAL DESCRIPTION
NJU7380 is a transrator, intended to convert from input step and direction pulse to driver's phase signal for 2-
phase stepper motor driver. Motor control is simply attained only by the pulse generator because you use it by
NJM3775 and the set.
s
LOGIC INPUT
NJU7380 contains all phase logic necessary to control the motor in a proper way. If any of the logic inputs are left
open, the circuit will accept it as a HIGH level. In order to make noise-proof nature into the maximum, it is
necessary to connect an idle input terminal to V
DD
level.
•
STEP – Stepping pulse
The built-in phase logic sequencer goes UP on every negative edge of the STEP signal (pulse). In full step
mode, the pulse turns the stepping motor at the basic step angle. In half step mode, two pulses are required to
turn the motor at the basic step angle.
The DIR (direction) signal and HSM (half/full mode) are latched to the STEP negative edge and must
therefore be established before the start of the negative edge. Note the setup time ts in Figure 4.
•
DIR – direction
The DIR signal determines the step direction. The direction of the stepping motor depends on how the
NJU7380 and NJM3775 are connected to the motor. Although DIR can be modified this should be avoided
since a misstep of 1 pulse increment may occur if it is set simultaneous with the negative edge. See the timing
chart in Figure 4.
-4-
NJU7380
•
HSM – half/full step mode switching
This signal determines whether the stepping motor turns at half step or full step mode. The built-in phase
logic is set to the half step mode when HSM is low level. Although HSM can be modified this should be
avoided since a misstep of 1 pulse increment may occur if it is set simultaneous with the negative edge. See
the timing chart in Figure 4.
•
RESET
A two-phase stepping motor repeats the same winding energizing sequence every angle that is a multiple of
four of the basic step. The phase logic sequence is repeated every four pulses in the full step mode and every
eight pulses in the half step mode.
RESET forces to initialize the phase logic to sequence start mode.
When RESET is at L level, the phase logic is initialized and the energizing pattern of phase logic at
sequence start is output. At this time, the STEP input of phase logic will be ignored during the RESET is at
Ｌ
level.
s
POR – power on and reset function
The internal power-on and reset circuit, which is connected to Vcc, resets the phase logic and turns off phase
output when the power is supplied to prevent missteps.
Each time the power is turned on, the energizing pattern of phase logic at sequence start is output.
s
MO – origin monitor
At sequence start of the phase logic or after POR or external RESET, an L level output is made to indicate to
external devices that the energizing sequence is in initial status.
In a system using a stepping motor, the device sensor and the MO AND function enable a higher resolution
detection of motor origin.
HSM,DIR
STEP,RESET
ts
Vp
tp
td
Fig.4 Timing chart
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