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FOD0708 Single Channel CMOS Optocoupler, FOD0738 Dual Channel CMOS Optocoupler
April 2009
FOD0708 Single Channel CMOS Optocoupler,
FOD0738 Dual Channel CMOS Optocoupler
Features
■
■
■
■
■
■
■
General Description
The FOD0708 and FOD0738 optocouplers consist of an
AlGaAs LED optically coupled to a high speed trans-
impedance amplifier and voltage comparator. These
optocouplers utilize the latest CMOS IC technology to
achieve outstanding performance with very low power
consumption. The devices are housed in a compact
8-pin SOIC package for optimum mounting density.
+5V CMOS compatibility
15ns typical pulse width distortion
30ns max. pulse width distortion
40ns max. propagation delay skew
High speed: 15 MBd
60ns max. propagation delay
10kV/µs minimum common mode rejection
■
–40°C to 100°C temperature range
■
UL approved (file #E90700)
Applications
■
■
■
■
Line receivers
Pulse transformer replacement
Output interface to CMOS-LSTTL-TTL
Wide bandwidth analog coupling
Schematics
NC
1
8
V
DD
ANODE 1
1
8
V
DD
ANODE
2
7
NC
CATHODE 1
2
7
V
O
1
CATHODE
3
6
V
O
CATHODE 2
3
6
V
O
2
NC
4
5
GND
ANODE 2
4
5
GND
FOD0708
TRUTH TABLE
LED
OFF
ON
V
O
OUTPUT
H
L
FOD0738
Note: A 0.1µF bypass capacitor
must be connected between
pins 5 and 8.
©2003 Fairchild Semiconductor Corporation
FOD0708, FOD0738 Rev. 1.0.8
www.fairchildsemi.com
FOD0708 Single Channel CMOS Optocoupler, FOD0738 Dual Channel CMOS Optocoupler
(T
A
= 25°C unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Absolute Maximum Ratings
Symbol
T
S
T
A
V
DD
V
O
I
O
I
F
Parameter
Storage Temperature
Ambient Operating Temperature
Supply Voltages
Output Voltage
Average Output Current
Average Forward Input Current
Lead Solder Temperature
Solder Reflow Temperature Profile
LED Power Dissipation
Single Channel
Dual Channel
Detector Power Dissipation
Single Channel
Dual Channel
Min.
–40
–40
0
–0.5
Max.
+125
+100
6
V
DD
+ 0.5
2
20
Units
°C
°C
Volts
Volts
mA
mA
260°C for 10 sec., 1.6 mm below seating plane
See Solder Reflow Temperature Profile Section
40mW (derate above 95°C, 1.4mW/°C)
40mW per channel (derate above 90°C, 1.2mW/°C)
85mW (derate above 75°C, 1.8mW/°C)
65mW per channel (derate above 90°C, 2.0mW/°C)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
T
A
V
DD
I
F
Supply Voltages
Parameter
Ambient Operating Temperature
Input Current (ON)
Min.
–40
4.5
10
Max.
+100
5.5
16
Units
°C
Volts
mA
Electrical Characteristics
(T
A
= –40°C to +100°C) and 4.5 V
≤
V
DD
≤
5.5 V
Symbol
V
F
BV
R
V
OH
V
OL
I
TH
I
DDL
I
DDH
Parameter
Input Forward Voltage
Input Reverse Breakdown Voltage
Logic High Output Voltage
Logic Low Output Voltage
Input Threshold Current
Logic Low Output Supply Current
Logic High Output Supply Current
(FOD0708)
(FOD0738)
(FOD0708)
(FOD0738)
(FOD0708)
(FOD0738)
Test
Conditions
I
F
= 12mA
I
R
= 10µA
I
F
= 0, I
O
= –20µA
I
F
= 12mA,
I
O
= 20µA
I
OL
= 20µA
I
F
= 12mA
I
F
= 0
Min. Typ.* Max. Units Fig.
1.3
5
4.0
5.0
0.01
4.0
4.4
3.4
6.9
3.7
7.5
0.1
8.2
8.2
14.0
18.0
11.0
15.0
1.45
1.8
V
V
V
V
mA
mA
mA
1,5
3,7
4,8
9
*All typicals at T
A
= 25°C and V
DD
= 5V unless otherwise noted.
©2003 Fairchild Semiconductor Corporation
FOD0708, FOD0738 Rev. 1.0.8
www.fairchildsemi.com
2
FOD0708 Single Channel CMOS Optocoupler, FOD0738 Dual Channel CMOS Optocoupler
Switching Characteristics
Symbol
t
PHL
t
PLH
Over recommended temperature (T
A
= –40°C to +100°C) and
4.5 V
≤
V
DD
≤
5.5 V. All typical specifications are at T
A
= 25°C, V
DD
= +5 V.
Parameter
Propagation Delay Time to
Logic Low Output
Propagation Delay Time to
Logic High Output
Pulse Width
Pulse Width Distortion
Propagation Delay Skew
Test Conditions
I
F
= 12mA, C
L
= 15pF
CMOS Signal Levels (Note 1) (Fig. 10)
I
F
= 12mA, C
L
= 15pF
CMOS Signal Levels,
(Note 1) (Fig. 10)
Min.
20
13
11
100
Typ.* Max.
60
60
60
Units
ns
ns
FOD0708
FOD0738
PW
| PWD |
t
PSK
t
R
t
F
| CM
H
|
ns
30
40
12
8
ns
ns
ns
ns
kV/µs
I
F
= 12mA, C
L
= 15pF,
CMOS Signal Levels (Note 2)
I
F
= 12mA, C
L
= 15pF,
CMOS Signal Levels (Note 3)
0
Output Rise Time (10%–90%) I
F
= 12mA, C
L
= 15pF,
CMOS Signal Levels
Output Fall Time (90%–10%)
Common Mode Transient
Immunity at Logic High
Output
I
F
= 12mA, C
L
= 15pF,
CMOS Signal Levels
V
CM
= 1000V, T
A
= 25°C, I
F
= 0mA,
(Note 4) (Fig. 11)
25
50
| CM
L
|
Common Mode Transient
V
CM
= 1000V, T
A
= 25°C, I
F
= 12mA,
Immunity at Logic Low Output (Note 5) (Fig. 11)
25
50
kV/µs
*All typicals at T
A
= 25°C and V
DD
= 5V unless otherwise noted.
Isolation Characteristics
(T
A
= -40°C to +100°C Unless otherwise specified.)
Characteristics
Input-Output Insulation
Leakage Current
Withstand Insulation
Test Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
Test Conditions Symbol
Relative humidity = 45%,
T
A
= 25°C, t = 5s,
V
I-O
= 3000 VDC (Note 6)
I
I-O
≤
10µA, R
H
< 50%,
T
A
= 25°C, t = 1 min. (Note 6)
V
I-O
= 500V (Note 6)
f = 1MHz (Note 6)
I
I-O
Min
Typ.*
Max
1.0
Unit
µA
V
ISO
R
I-O
C
I-O
2500
10
12
0.6
V
RMS
Ω
pF
*All typical values are at V
CC
= 5 V, T
A
= 25°C
Notes:
1. Propagation delay time, high to low (t
PHL
), is measured from the 50% level on the rising edge of the input pulse to
the 2.5V level of the falling edge of the output voltage signal. Propagation delay time, low to high (t
PLH
), is measured
from the 50% level on the falling edge of the input pulse to the 2.5V level of the rising edge of the output voltage
signal.
2. Pulse width distoration is defined as the absolute difference between the high to low and low to high propagation
delay times, | t
PHL
– t
PLH
|.
3. Propagation delay skew, t
PSK
, is defined as the worst case difference in t
PHL
or t
PLH
between units within the
recommended operating range of the device.
4. CM
H
– The maximum tolerated rate of rise of the common mode voltage to ensure the output will remain in the high
state, (i,e., V
OUT
> 2.0V) Measured in kilovolts per microsecond (kV/µs).
5. CM
L
– The maximum tolerated rate of fall of the common mode voltage to ensure the output will remain in the low
state, (i,e., V
OUT
< 0.8V). Measured in kilovolts per microsecond (kV/µs).
6. Isolation voltage, V
ISO
, is an internal device dielectric breakdown rating. For this test, pins 1,2,3,4 are common, and
pins 5,6,7,8 are common.
©2003 Fairchild Semiconductor Corporation
FOD0708, FOD0738 Rev. 1.0.8
www.fairchildsemi.com
3
FOD0708 Single Channel CMOS Optocoupler, FOD0738 Dual Channel CMOS Optocoupler
Typical Performance Curves
Figure 1. FOD0708
Typical Input Threshold Current
vs Ambient Temperature
7
100
Figure 2. FOD0708
Typical Switching Speed vs Pulse Input Current
V
DD
= 5V
o
T
A
= 25 C
80
V
DD
= 5V
I
OL
= 20µA
I
TH
- Input Threshold Current (mA)
t
P
- Propagation Delay (ns)
6
5
60
t
PHL
40
t
PLH
4
3
20
PWD
2
-40
-20
0
20
40
60
80
100
0
5
7
9
11
13
15
T
A
- Ambient Temperature (
o
C)
I
F
- Pulse Input Current (mA)
Figure 3. FOD0708
Typical Logic Low Output Supply Current
vs Ambient Temperature
5.0
5.0
V
DD
= 5V
I
F
= 12mA
4.5
Figure 4. FOD0708
Typical Logic High Output Supply Current
vs Ambient Temperature
I
DDH
- Logic High Output Supply Current (mA)
V
DD
= 5V
4.5
I
DDL
- Logic Low Output Supply Current (mA)
4.0
4.0
3.5
3.5
3.0
3.0
2.5
2.5
2.0
-40
-20
0
20
40
60
o
2.0
80
100
-40
-20
0
20
40
60
o
80
100
T
A
- Ambient Temperature ( C)
T
A
- Ambient Temperature ( C)
©2003 Fairchild Semiconductor Corporation
FOD0708, FOD0738 Rev. 1.0.8
www.fairchildsemi.com
4
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