INTEGRATED CIRCUITS
CBT16211
24-bit bus switch with 12-bit output enables
Product data
2001 Jun 13
Philips
Semiconductors
Philips Semiconductors
Product data
24-bit bus switch with 12-bit output enables
CBT16211
FEATURES
•
5
Ω
switch connection between two ports
•
TTL compatible control input levels
•
Package options include plastic shrink small outline (SSOP),
thin shrink small outline (TSSOP)
DESCRIPTION
The CBT16211 provides 24 bits of high-speed TTL-compatible bus
switching. The low on-state resistance of the switch allows
connections to be made with minimal propagation delay.
The device is organized as a dual 12-bit bus switch with separate
output-enable (OE) inputs. It can be used as two 12-bit bus switches
or as one 24-bit bus switch. When OE is low, the associated 12-bit
bus switch is on, and port A is connected to port B. When OE is
high, the switch is open, and a high-impedance state exists between
the ports.
The CBT16211 is characterized for operation from –40 to 85
°C.
•
ESD protection exceeds 1000 V CDM per JESD22-C101
•
Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 100 mA
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CC
PARAMETER
Propagation delay
An to Yn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25
°C;
GND = 0 V
C
L
= 50 pF; V
CC
= 5 V
V
I
= 0 V or V
CC
Outputs disabled; V
O
= 0 V or V
CC
Outputs disabled; V
CC
= 5.5 V
TYPICAL
0.25
4.3
6.9
3.0
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40 to 85
°C
–40 to 85
°C
ORDER CODE
CBT16211DL
CBT16211DGG
DWG NUMBER
SOT371-1
SOT364-1
FUNCTION TABLE
INPUTS
1OE
L
L
H
H
2OE
L
H
L
H
OUTPUTS
1A, 1B
1A = 1B
1A = 1B
Z
Z
2A, 2B
2A = 2B
LOGIC SYMBOL
2
1A1
54
1B1
14
42
1B12
Z
2A = 2B
Z
1A12
H = High voltage level
L = Low voltage level
Z = High impedance “off ” state
56
1OE
15
2A1
41
2B1
28
2A12
29
2B12
55
2OE
SA00510
2001 Jun 13
2
853-2259 26502
Philips Semiconductors
Product data
24-bit bus switch with 12-bit output enables
CBT16211
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NC
1OE, 2OE
1A1-1A12
1B1-1B12
2A1-2A12
2B1-2B12
GND
V
CC
NAME AND FUNCTION
No internal connection
Output Enables
Inputs
Outputs
Inputs
Outputs
Ground (0 V)
Positive supply voltage
1
56, 55
2, 3, 4, 5, 6, 7, 9, 10,
11, 12, 13, 14
54, 53, 52, 51, 50, 48,
47, 46, 45, 44, 43, 42
15, 16, 18, 20, 21, 22,
23, 24, 25, 26, 27, 28
41, 40, 39, 37, 36, 35,
34, 33, 32, 31, 30, 29
8, 19, 38, 49
17
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1
2
3
4
5
6
7
8
9
56 1OE
55 2OE
54 1B1
53 1B2
52 1B3
51 1B4
50 1B5
49 GND
48 1B6
47 1B7
46 1B8
45 1B9
44 1B10
43 1B11
42 1B12
41 2B1
40 2B2
39 2B3
38 GND
37 2B4
36 2B5
35 2B6
34 2B7
33 2B8
32 2B9
31 2B10
30 2B11
29 2B12
1A8 10
1A9 11
1A10 12
1A11 13
1A12 14
2A1 15
2A2 16
V
CC
17
2A3 18
GND 19
2A4 20
2A5 21
2A6 22
2A7 23
2A8 24
2A9 25
2A10 26
2A11 27
2A12 28
SA00509
2001 Jun 13
3
Philips Semiconductors
Product data
24-bit bus switch with 12-bit output enables
CBT16211
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
V
OUT
I
OUT
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output voltage
3
DC output current
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–50
–0.5 to +7.0
–0.5 to +5.5
128
UNIT
V
mA
V
V
mA
T
stg
Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
T
amb
DC supply voltage
High-level input voltage
Low-level Input voltage
Operating free-air temperature range
PARAMETER
LIMITS
Min
4.5
2.0
—
–40
Max
5.5
—
0.8
+85
UNIT
V
V
V
°C
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
V
IK
V
P
I
I
I
CC
∆I
CC
C
I
C
I(OFF)
PARAMETER
Input clamp voltage
Output high pass voltage
Input leakage current
Quiescent supply current
Additional supply current per
input pin
2
Control pins
Port OFF capacitance
TEST CONDITIONS
V
CC
= 4.5 V; I
I
= –18 mA
V
IN
= V
CC
= 5.0 V; I
OUT
= –100
µA
V
CC
= 0 V; V
I
= 5.5 V
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND
V
CC
= 5.5 V, one input at 3.4 V,
other inputs at V
CC
or GND
V
I
= 3 V or 0
V
O
= 3 V or 0, OE = V
CC
V
CC
= 4.0 V; V
1
= 2.4 V; I
I
= 15 mA
r
on3
V
CC
= 4.5 V; V
1
= 0 V; I
I
= 64 mA
V
CC
= 4.5 V; V
1
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
1
= 2.4 V; I
I
= –15 mA
T
amb
= –40 to +85
°C
Min
—
3.4
—
—
—
—
—
—
—
—
—
—
Typ
1
—
3.6
—
—
—
—
4.5
6.9
14
5
5
8
Max
–1.2
3.9
10
±1
3
2.5
—
—
20
7
7
12
Ω
V
V
µA
µA
mA
pF
pF
UNIT
NOTES:
1. All typical values are at V
CC
= 5 V, T
amb
= 25
°C.
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch.
On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
2001 Jun 13
4
Philips Semiconductors
Product data
24-bit bus switch with 12-bit output enables
CBT16211
AC CHARACTERISTICS
GND = 0 V; t
R;
C
L
= 50 pF
SYMBOL
t
pd
t
en
t
dis
PARAMETER
Propagation delay
1
Output enable time
to High and Low level
Output disable time
from High and Low level
FROM
(INPUT)
A or B
OE
OE
TO
(OUTPUT)
B or A
A or B
A or B
V
CC
= 5.0 V
±0.5
V
Min
—
1.5
1.5
Max
0.25
6.0
6.0
ns
ns
ns
UNIT
NOTE:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
AC WAVEFORMS
V
M
= 1.5 V, V
IN
= GND to 3.0 V.
3V
1.5 V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5 V
OUTPUT
V
OL
1.5 V
1.5 V
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
SA00028
Waveform 1. Input (An) to Output (Yn) Propagation Delays
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
3V
Output Control
(Low-level
enabling )
t
PZL
Output
Waveform 1
S1 at 7 V
(see Note)
t
PZH
Output
Waveform 2
S1 at Open
(see Note)
1.5 V
1.5 V
0V
3.5 V
1.5 V
t
PHZ
V
OH
– 0.3 V
1.5 V
0V
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
SA00012
t
PLZ
V
OL
+ 0.3 V
V
OL
V
OH
SA00029
Waveform 2. 3-State Output Enable and Disable Times
2001 Jun 13
5
测试/测量
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